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Commit f6dfa509 authored by Raghavendra Kakarla's avatar Raghavendra Kakarla
Browse files

ARM: dts: msm: Add MPM interrupt controller for trinket 



Add mpm interrupt controller as SOC interrupt parent and
as a child domain under intc for trinket.

Change-Id: I72e133e58b0faec6edc71efa4d5a2ce355b5a7aa
Signed-off-by: default avatarRaghavendra Kakarla <rkakarla@codeaurora.org>
parent 7e2a13ad

arch/arm64/boot/dts/qcom/trinket-pinctrl.dtsi

+2 −1
Original line number Diff line number Diff line
@@ -17,10 +17,11 @@ 
		compatible = "qcom,trinket-pinctrl";

		reg = <0x400000 0xc00000>;

		reg-names = "pinctrl";

		interrupts = <0 227 0>;

		interrupts-extended = <&wakegic GIC_SPI 227 IRQ_TYPE_NONE>;

		gpio-controller;

		#gpio-cells = <2>;

		interrupt-controller;

		interrupt-parent = <&wakegpio>;

		#interrupt-cells = <2>;



		/* QUPv3_0 SE mappings */

arch/arm64/boot/dts/qcom/trinket.dtsi

+22 −1
Original line number Diff line number Diff line
@@ -27,7 +27,7 @@ 
	model = "Qualcomm Technologies, Inc. TRINKET";

	compatible = "qcom,trinket";

	qcom,msm-id = <394 0x10000>;

	interrupt-parent = <&intc>;

	interrupt-parent = <&wakegic>;



	aliases {

		serial0 = &qupv3_se4_2uart;
@@ -520,6 +520,7 @@ 
		compatible = "arm,gic-v3";

		#interrupt-cells = <3>;

		interrupt-controller;

		interrupt-parent = <&intc>;

		#redistributor-regions = <1>;

		redistributor-stride = <0x0 0x20000>;

		reg = <0xf200000 0x10000>,     /* GICD */
@@ -615,6 +616,26 @@ 
		qcom,coresight-jtagmm-cpu = <&CPU7>;

	};



	wakegic: wake-gic {

		compatible = "qcom,mpm-gic-trinket", "qcom,mpm-gic";

		interrupts-extended = <&wakegic GIC_SPI 171

						IRQ_TYPE_EDGE_RISING>;

		reg = <0x45f01b8 0x1000>,

			<0xf011008 0x4>;  /* MSM_APCS_GCC_BASE 4K */

		reg-names = "vmpm", "ipc";

		qcom,num-mpm-irqs = <96>;

		interrupt-controller;

		interrupt-parent = <&intc>;

		#interrupt-cells = <3>;

	};



	wakegpio: wake-gpio {

		compatible = "qcom,mpm-gpio-trinket", "qcom,mpm-gpio";

		interrupt-controller;

		interrupt-parent = <&intc>;

		#interrupt-cells = <2>;

	};



	timer {

		compatible = "arm,armv8-timer";

		interrupts = <1 1 0xf08>,