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Commit f63d19ef authored by Stephen Boyd's avatar Stephen Boyd
Browse files

Merge branch 'clk-iproc' into clk-next

* clk-iproc:
  clk: iproc: define Broadcom NS2 iProc clock binding
  clk: iproc: define Broadcom NSP iProc clock binding
  clk: ns2: add clock support for Broadcom Northstar 2 SoC
  clk: iproc: Separate status and control variables
  clk: iproc: Split off dig_filter
  clk: iproc: Add PLL base write function
  clk: nsp: add clock support for Broadcom Northstar Plus SoC
  clk: iproc: Add PWRCTRL support
  clk: cygnus: Convert all macros to all caps
  ARM: cygnus: fix link failures when CONFIG_COMMON_CLK_IPROC is disabled
parents 938ce30e 0064c862
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+78 −0
Original line number Original line Diff line number Diff line
@@ -130,3 +130,81 @@ These clock IDs are defined in:
    ch3_unused mipipll          4       BCM_CYGNUS_MIPIPLL_CH3_UNUSED
    ch3_unused mipipll          4       BCM_CYGNUS_MIPIPLL_CH3_UNUSED
    ch4_unused mipipll          5       BCM_CYGNUS_MIPIPLL_CH4_UNUSED
    ch4_unused mipipll          5       BCM_CYGNUS_MIPIPLL_CH4_UNUSED
    ch5_unused mipipll          6       BCM_CYGNUS_MIPIPLL_CH5_UNUSED
    ch5_unused mipipll          6       BCM_CYGNUS_MIPIPLL_CH5_UNUSED

Northstar and Northstar Plus
------
PLL and leaf clock compatible strings for Northstar and Northstar Plus are:
 "brcm,nsp-armpll"
 "brcm,nsp-genpll"
 "brcm,nsp-lcpll0"

The following table defines the set of PLL/clock index and ID for Northstar and
Northstar Plus.  These clock IDs are defined in:
    "include/dt-bindings/clock/bcm-nsp.h"

    Clock	Source		Index	ID
    ---		-----		-----	---------
    crystal	N/A		N/A	N/A

    armpll	crystal		N/A	N/A

    genpll	crystal		0	BCM_NSP_GENPLL
    phy		genpll		1	BCM_NSP_GENPLL_PHY_CLK
    ethernetclk	genpll		2	BCM_NSP_GENPLL_ENET_SW_CLK
    usbclk	genpll		3	BCM_NSP_GENPLL_USB_PHY_REF_CLK
    iprocfast	genpll		4	BCM_NSP_GENPLL_IPROCFAST_CLK
    sata1	genpll		5	BCM_NSP_GENPLL_SATA1_CLK
    sata2	genpll		6	BCM_NSP_GENPLL_SATA2_CLK

    lcpll0	crystal		0	BCM_NSP_LCPLL0
    pcie_phy	lcpll0		1	BCM_NSP_LCPLL0_PCIE_PHY_REF_CLK
    sdio	lcpll0		2	BCM_NSP_LCPLL0_SDIO_CLK
    ddr_phy	lcpll0		3	BCM_NSP_LCPLL0_DDR_PHY_CLK

Northstar 2
-----------
PLL and leaf clock compatible strings for Northstar 2 are:
    "brcm,ns2-genpll-scr"
    "brcm,ns2-genpll-sw"
    "brcm,ns2-lcpll-ddr"
    "brcm,ns2-lcpll-ports"

The following table defines the set of PLL/clock index and ID for Northstar 2.
These clock IDs are defined in:
    "include/dt-bindings/clock/bcm-ns2.h"

    Clock	Source		Index	ID
    ---		-----		-----	---------
    crystal	N/A		N/A	N/A

    genpll_scr	crystal		0	BCM_NS2_GENPLL_SCR
    scr		genpll_scr	1	BCM_NS2_GENPLL_SCR_SCR_CLK
    fs		genpll_scr	2	BCM_NS2_GENPLL_SCR_FS_CLK
    audio_ref	genpll_scr	3	BCM_NS2_GENPLL_SCR_AUDIO_CLK
    ch3_unused	genpll_scr	4	BCM_NS2_GENPLL_SCR_CH3_UNUSED
    ch4_unused	genpll_scr	5	BCM_NS2_GENPLL_SCR_CH4_UNUSED
    ch5_unused	genpll_scr	6	BCM_NS2_GENPLL_SCR_CH5_UNUSED

    genpll_sw	crystal		0	BCM_NS2_GENPLL_SW
    rpe		genpll_sw	1	BCM_NS2_GENPLL_SW_RPE_CLK
    250		genpll_sw	2	BCM_NS2_GENPLL_SW_250_CLK
    nic		genpll_sw	3	BCM_NS2_GENPLL_SW_NIC_CLK
    chimp	genpll_sw	4	BCM_NS2_GENPLL_SW_CHIMP_CLK
    port	genpll_sw	5	BCM_NS2_GENPLL_SW_PORT_CLK
    sdio	genpll_sw	6	BCM_NS2_GENPLL_SW_SDIO_CLK

    lcpll_ddr	crystal		0	BCM_NS2_LCPLL_DDR
    pcie_sata_usb lcpll_ddr	1	BCM_NS2_LCPLL_DDR_PCIE_SATA_USB_CLK
    ddr		lcpll_ddr	2	BCM_NS2_LCPLL_DDR_DDR_CLK
    ch2_unused	lcpll_ddr	3	BCM_NS2_LCPLL_DDR_CH2_UNUSED
    ch3_unused	lcpll_ddr	4	BCM_NS2_LCPLL_DDR_CH3_UNUSED
    ch4_unused	lcpll_ddr	5	BCM_NS2_LCPLL_DDR_CH4_UNUSED
    ch5_unused	lcpll_ddr	6	BCM_NS2_LCPLL_DDR_CH5_UNUSED

    lcpll_ports	crystal		0	BCM_NS2_LCPLL_PORTS
    wan		lcpll_ports	1	BCM_NS2_LCPLL_PORTS_WAN_CLK
    rgmii	lcpll_ports	2	BCM_NS2_LCPLL_PORTS_RGMII_CLK
    ch2_unused	lcpll_ports	3	BCM_NS2_LCPLL_PORTS_CH2_UNUSED
    ch3_unused	lcpll_ports	4	BCM_NS2_LCPLL_PORTS_CH3_UNUSED
    ch4_unused	lcpll_ports	5	BCM_NS2_LCPLL_PORTS_CH4_UNUSED
    ch5_unused	lcpll_ports	6	BCM_NS2_LCPLL_PORTS_CH5_UNUSED
+1 −1
Original line number Original line Diff line number Diff line
@@ -14,7 +14,7 @@ config ARCH_BCM_IPROC
	select HAVE_ARM_SCU if SMP
	select HAVE_ARM_SCU if SMP
	select HAVE_ARM_TWD if SMP
	select HAVE_ARM_TWD if SMP
	select ARM_GLOBAL_TIMER
	select ARM_GLOBAL_TIMER

	select COMMON_CLK_IPROC
	select CLKSRC_MMIO
	select CLKSRC_MMIO
	select ARCH_REQUIRE_GPIOLIB
	select ARCH_REQUIRE_GPIOLIB
	select ARM_AMBA
	select ARM_AMBA
+1 −1
Original line number Original line Diff line number Diff line
@@ -48,7 +48,7 @@ obj-$(CONFIG_COMMON_CLK_WM831X) += clk-wm831x.o
obj-$(CONFIG_COMMON_CLK_XGENE)		+= clk-xgene.o
obj-$(CONFIG_COMMON_CLK_XGENE)		+= clk-xgene.o
obj-$(CONFIG_COMMON_CLK_PWM)		+= clk-pwm.o
obj-$(CONFIG_COMMON_CLK_PWM)		+= clk-pwm.o
obj-$(CONFIG_COMMON_CLK_AT91)		+= at91/
obj-$(CONFIG_COMMON_CLK_AT91)		+= at91/
obj-$(CONFIG_ARCH_BCM)			+= bcm/
obj-y					+= bcm/
obj-$(CONFIG_ARCH_BERLIN)		+= berlin/
obj-$(CONFIG_ARCH_BERLIN)		+= berlin/
obj-$(CONFIG_ARCH_HISI)			+= hisilicon/
obj-$(CONFIG_ARCH_HISI)			+= hisilicon/
obj-$(CONFIG_ARCH_MXC)			+= imx/
obj-$(CONFIG_ARCH_MXC)			+= imx/
+1 −3
Original line number Original line Diff line number Diff line
@@ -9,10 +9,8 @@ config CLK_BCM_KONA
	  in the BCM281xx and BCM21664 families.
	  in the BCM281xx and BCM21664 families.


config COMMON_CLK_IPROC
config COMMON_CLK_IPROC
	bool "Broadcom iProc clock support"
	bool
	depends on ARCH_BCM_IPROC || COMPILE_TEST
	depends on COMMON_CLK
	depends on COMMON_CLK
	default ARCH_BCM_IPROC
	help
	help
	  Enable common clock framework support for Broadcom SoCs
	  Enable common clock framework support for Broadcom SoCs
	  based on the iProc architecture
	  based on the iProc architecture
+3 −0
Original line number Original line Diff line number Diff line
@@ -4,4 +4,7 @@ obj-$(CONFIG_CLK_BCM_KONA) += clk-bcm281xx.o
obj-$(CONFIG_CLK_BCM_KONA)	+= clk-bcm21664.o
obj-$(CONFIG_CLK_BCM_KONA)	+= clk-bcm21664.o
obj-$(CONFIG_COMMON_CLK_IPROC)	+= clk-iproc-armpll.o clk-iproc-pll.o clk-iproc-asiu.o
obj-$(CONFIG_COMMON_CLK_IPROC)	+= clk-iproc-armpll.o clk-iproc-pll.o clk-iproc-asiu.o
obj-$(CONFIG_ARCH_BCM2835)	+= clk-bcm2835.o
obj-$(CONFIG_ARCH_BCM2835)	+= clk-bcm2835.o
obj-$(CONFIG_COMMON_CLK_IPROC)	+= clk-ns2.o
obj-$(CONFIG_ARCH_BCM_CYGNUS)	+= clk-cygnus.o
obj-$(CONFIG_ARCH_BCM_CYGNUS)	+= clk-cygnus.o
obj-$(CONFIG_ARCH_BCM_NSP)	+= clk-nsp.o
obj-$(CONFIG_ARCH_BCM_5301X)	+= clk-nsp.o
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