Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit f3e18bb0 authored by Raviteja Tamatam's avatar Raviteja Tamatam Committed by Gerrit - the friendly Code Review server
Browse files

msm: mdss: Add mdss capabilities for msmfalcon



Add MDSS version info along with other capabilities
for msmfalcon.

Change-Id: Ide652165711eec23644d36837f3847d896293709
Signed-off-by: default avatarRaviteja Tamatam <travitej@codeaurora.org>
Signed-off-by: default avatarRahul Shahare <rshaha@codeaurora.org>
parent 9cc0768c
Loading
Loading
Loading
Loading
+3 −1
Original line number Diff line number Diff line
@@ -1470,7 +1470,9 @@ static inline struct mdss_mdp_misr_map *mdss_misr_get_map(u32 block_id,
						(mdata->mdp_rev ==
							MDSS_MDP_HW_REV_300) ||
						(mdata->mdp_rev ==
							MDSS_MDP_HW_REV_301)) {
							MDSS_MDP_HW_REV_301) ||
						(mdata->mdp_rev ==
							MDSS_MDP_HW_REV_320)) {
						ctrl_reg += 0x8;
						value_reg += 0x8;
					}
+42 −0
Original line number Diff line number Diff line
@@ -2075,6 +2075,48 @@ static void mdss_mdp_hw_rev_caps_init(struct mdss_data_type *mdata)
		mdata->has_wb_ubwc = true;
		set_bit(MDSS_CAPS_10_BIT_SUPPORTED, mdata->mdss_caps_map);
		break;
	case MDSS_MDP_HW_REV_320:
		mdata->max_target_zorder = 7; /* excluding base layer */
		mdata->max_cursor_size = 512;
		mdata->per_pipe_ib_factor.numer = 8;
		mdata->per_pipe_ib_factor.denom = 5;
		mdata->apply_post_scale_bytes = false;
		mdata->hflip_buffer_reused = false;
		mdata->min_prefill_lines = 25;
		mdata->has_ubwc = true;
		mdata->pixel_ram_size = 50 * 1024;
		mdata->rects_per_sspp[MDSS_MDP_PIPE_TYPE_DMA] = 2;

		//mem_protect_sd_ctrl_id = MEM_PROTECT_SD_CTRL_SWITCH;
		set_bit(MDSS_QOS_PER_PIPE_IB, mdata->mdss_qos_map);
		set_bit(MDSS_QOS_REMAPPER, mdata->mdss_qos_map);
		set_bit(MDSS_QOS_TS_PREFILL, mdata->mdss_qos_map);
		set_bit(MDSS_QOS_OVERHEAD_FACTOR, mdata->mdss_qos_map);
		set_bit(MDSS_QOS_CDP, mdata->mdss_qos_map); /* cdp supported */
		mdata->enable_cdp = false; /* disable cdp */
		set_bit(MDSS_QOS_OTLIM, mdata->mdss_qos_map);
		set_bit(MDSS_QOS_PER_PIPE_LUT, mdata->mdss_qos_map);
		set_bit(MDSS_QOS_SIMPLIFIED_PREFILL, mdata->mdss_qos_map);
		set_bit(MDSS_QOS_TS_PREFILL, mdata->mdss_qos_map);
		set_bit(MDSS_QOS_IB_NOCR, mdata->mdss_qos_map);
		//set_bit(MDSS_QOS_WB2_WRITE_GATHER_EN, mdata->mdss_qos_map);
		set_bit(MDSS_CAPS_YUV_CONFIG, mdata->mdss_caps_map);
		set_bit(MDSS_CAPS_SCM_RESTORE_NOT_REQUIRED,
			mdata->mdss_caps_map);
		set_bit(MDSS_CAPS_3D_MUX_UNDERRUN_RECOVERY_SUPPORTED,
			mdata->mdss_caps_map);
		set_bit(MDSS_CAPS_QSEED3, mdata->mdss_caps_map);
		//set_bit(MDSS_CAPS_MDP_VOTE_CLK_NOT_SUPPORTED,
		//	mdata->mdss_caps_map);
		mdss_mdp_init_default_prefill_factors(mdata);
		mdss_set_quirk(mdata, MDSS_QUIRK_DSC_RIGHT_ONLY_PU);
		mdss_set_quirk(mdata, MDSS_QUIRK_DSC_2SLICE_PU_THRPUT);
		//mdss_set_quirk(mdata, MDSS_QUIRK_MMSS_GDSC_COLLAPSE);
		mdss_set_quirk(mdata, MDSS_QUIRK_MDP_CLK_SET_RATE);
		mdata->has_wb_ubwc = true;
		set_bit(MDSS_CAPS_10_BIT_SUPPORTED, mdata->mdss_caps_map);
		//set_bit(MDSS_CAPS_SEC_DETACH_SMMU, mdata->mdss_caps_map);
		break;
	default:
		mdata->max_target_zorder = 4; /* excluding base layer */
		mdata->max_cursor_size = 64;
+3 −1
Original line number Diff line number Diff line
@@ -1322,7 +1322,9 @@ static inline int mdss_mdp_panic_signal_support_mode(
		IS_MDSS_MAJOR_MINOR_SAME(mdata->mdp_rev,
				MDSS_MDP_HW_REV_116) ||
		IS_MDSS_MAJOR_MINOR_SAME(mdata->mdp_rev,
				MDSS_MDP_HW_REV_117))
				MDSS_MDP_HW_REV_117) ||
		IS_MDSS_MAJOR_MINOR_SAME(mdata->mdp_rev,
				MDSS_MDP_HW_REV_320))
		signal_mode = MDSS_MDP_PANIC_PER_PIPE_CFG;

	return signal_mode;
+1 −0
Original line number Diff line number Diff line
@@ -119,6 +119,7 @@
#define MDSS_MDP_HW_REV_117	MDSS_MDP_REV(1, 17, 0) /* qcs405 */
#define MDSS_MDP_HW_REV_300	MDSS_MDP_REV(3, 0, 0)  /* msmcobalt */
#define MDSS_MDP_HW_REV_301	MDSS_MDP_REV(3, 0, 1)  /* msmcobalt v1.0 */
#define MDSS_MDP_HW_REV_320     MDSS_MDP_REV(3, 2, 0)  /* sdm660 */

enum {
	NOTIFY_UPDATE_INIT,