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Commit f10d72b6 authored by Odelu Kukatla's avatar Odelu Kukatla Committed by Gerrit - the friendly Code Review server
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clk: qcom: Add camera clock driver for ATOLL 



Add support for camera clock controller found on ATOLL
based devices. This will allow camera device drivers
to probe and control their clocks.

Change-Id: I9dc7f969d052d77374cc02e064c9cba63b8beb20
Signed-off-by: default avatarOdelu Kukatla <okukatla@codeaurora.org>
parent 1642bff4

Documentation/devicetree/bindings/clock/qcom,camcc.txt

+2 −1
Original line number Diff line number Diff line
@@ -8,7 +8,8 @@ Required properties : 
		"qcom,camcc-sdmshrike",

		"qcom,camcc-sm6150",

		"qcom,camcc-sdmmagpie",

		"qcom,camcc-sa6155".

		"qcom,camcc-sa6155",

		"qcom,atoll-camcc".

- reg : shall contain base register location and length.

- reg-names: names of registers listed in the same order as in

	     the reg property.

drivers/clk/qcom/Kconfig

+9 −0
Original line number Diff line number Diff line
@@ -578,3 +578,12 @@ config SM_GCC_ATOLL 
	  ATOLL devices.

	  Say Y if you want to use peripheral devices such as UART, SPI, I2C,

	  USB, UFS, SD/eMMC, PCIe, etc.



config SM_CAMCC_ATOLL

	tristate "ATOLL Camera Clock Controller"

	depends on COMMON_CLK_QCOM

	help

	  Support for the camera clock controller on Qualcomm Technologies, Inc

	  ATOLL devices.

	  Say Y if you want to support camera devices and functionality such as

	  capturing pictures.

drivers/clk/qcom/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -72,6 +72,7 @@ obj-$(CONFIG_QCOM_CLK_RPM) += clk-rpm.o 
obj-$(CONFIG_QCOM_CLK_SMD_RPM) += clk-smd-rpm.o

obj-$(CONFIG_QCOM_CLK_VIRT) += clk-virt.o clk-virt-sm8150.o clk-virt-sm6150.o

obj-$(CONFIG_QCS_CMN_BLK_PLL) += cmn-blk-pll.o

obj-$(CONFIG_SM_CAMCC_ATOLL) += camcc-atoll.o

obj-$(CONFIG_SM_DEBUGCC_TRINKET) += debugcc-trinket.o

obj-$(CONFIG_SM_DISPCC_TRINKET) += dispcc-trinket.o

obj-$(CONFIG_SM_GCC_ATOLL) += gcc-atoll.o

drivers/clk/qcom/camcc-atoll.c

0 → 100644
+1922 −0

File added.

Preview size limit exceeded, changes collapsed.

include/dt-bindings/clock/qcom,camcc-atoll.h

+52 −55
Original line number Diff line number Diff line
@@ -20,14 +20,14 @@ 
#define CAM_CC_PLL1						2

#define CAM_CC_PLL1_OUT_EVEN					3

#define CAM_CC_PLL2						4

#define CAM_CC_PLL2_OUT_AUX					5

#define CAM_CC_PLL3						6

#define CAM_CC_BPS_AHB_CLK					7

#define CAM_CC_BPS_AREG_CLK					8

#define CAM_CC_BPS_AXI_CLK					9

#define CAM_CC_BPS_CLK						10

#define CAM_CC_BPS_CLK_SRC					11

#define CAM_CC_CAMNOC_ATB_CLK					12

#define CAM_CC_PLL2_OUT_AUX2					5

#define CAM_CC_PLL2_OUT_EARLY                                   6

#define CAM_CC_PLL3						7

#define CAM_CC_BPS_AHB_CLK					8

#define CAM_CC_BPS_AREG_CLK					9

#define CAM_CC_BPS_AXI_CLK					10

#define CAM_CC_BPS_CLK						11

#define CAM_CC_BPS_CLK_SRC					12

#define CAM_CC_CAMNOC_AXI_CLK					13

#define CAM_CC_CCI_0_CLK					14

#define CAM_CC_CCI_0_CLK_SRC					15
@@ -49,52 +49,49 @@ 
#define CAM_CC_CSIPHY2_CLK					31

#define CAM_CC_CSIPHY3_CLK					32

#define CAM_CC_FAST_AHB_CLK_SRC					33

#define CAM_CC_ICP_APB_CLK					34

#define CAM_CC_ICP_ATB_CLK					35

#define CAM_CC_ICP_CLK						36

#define CAM_CC_ICP_CLK_SRC					37

#define CAM_CC_ICP_CTI_CLK					38

#define CAM_CC_ICP_TS_CLK					39

#define CAM_CC_IFE_0_AXI_CLK					40

#define CAM_CC_IFE_0_CLK					41

#define CAM_CC_IFE_0_CLK_SRC					42

#define CAM_CC_IFE_0_CPHY_RX_CLK				43

#define CAM_CC_IFE_0_CSID_CLK					44

#define CAM_CC_IFE_0_CSID_CLK_SRC				45

#define CAM_CC_IFE_0_DSP_CLK					46

#define CAM_CC_IFE_1_AXI_CLK					47

#define CAM_CC_IFE_1_CLK					48

#define CAM_CC_IFE_1_CLK_SRC					49

#define CAM_CC_IFE_1_CPHY_RX_CLK				50

#define CAM_CC_IFE_1_CSID_CLK					51

#define CAM_CC_IFE_1_CSID_CLK_SRC				52

#define CAM_CC_IFE_1_DSP_CLK					53

#define CAM_CC_IFE_LITE_CLK					54

#define CAM_CC_IFE_LITE_CLK_SRC					55

#define CAM_CC_IFE_LITE_CPHY_RX_CLK				56

#define CAM_CC_IFE_LITE_CSID_CLK				57

#define CAM_CC_IFE_LITE_CSID_CLK_SRC				58

#define CAM_CC_IPE_0_AHB_CLK					59

#define CAM_CC_IPE_0_AREG_CLK					60

#define CAM_CC_IPE_0_AXI_CLK					61

#define CAM_CC_IPE_0_CLK					62

#define CAM_CC_IPE_0_CLK_SRC					63

#define CAM_CC_JPEG_CLK						64

#define CAM_CC_JPEG_CLK_SRC					65

#define CAM_CC_LRME_CLK						66

#define CAM_CC_LRME_CLK_SRC					67

#define CAM_CC_MCLK0_CLK					68

#define CAM_CC_MCLK0_CLK_SRC					69

#define CAM_CC_MCLK1_CLK					70

#define CAM_CC_MCLK1_CLK_SRC					71

#define CAM_CC_MCLK2_CLK					72

#define CAM_CC_MCLK2_CLK_SRC					73

#define CAM_CC_MCLK3_CLK					74

#define CAM_CC_MCLK3_CLK_SRC					75

#define CAM_CC_MCLK4_CLK					76

#define CAM_CC_MCLK4_CLK_SRC					77

#define CAM_CC_SLOW_AHB_CLK_SRC					78

#define CAM_CC_SOC_AHB_CLK					79

#define CAM_CC_SYS_TMR_CLK					80

#define CAM_CC_ICP_CLK						34

#define CAM_CC_ICP_CLK_SRC					35

#define CAM_CC_ICP_TS_CLK					36

#define CAM_CC_IFE_0_AXI_CLK					37

#define CAM_CC_IFE_0_CLK					38

#define CAM_CC_IFE_0_CLK_SRC					39

#define CAM_CC_IFE_0_CPHY_RX_CLK				40

#define CAM_CC_IFE_0_CSID_CLK					41

#define CAM_CC_IFE_0_CSID_CLK_SRC				42

#define CAM_CC_IFE_0_DSP_CLK					43

#define CAM_CC_IFE_1_AXI_CLK					44

#define CAM_CC_IFE_1_CLK					45

#define CAM_CC_IFE_1_CLK_SRC					46

#define CAM_CC_IFE_1_CPHY_RX_CLK				47

#define CAM_CC_IFE_1_CSID_CLK					48

#define CAM_CC_IFE_1_CSID_CLK_SRC				49

#define CAM_CC_IFE_1_DSP_CLK					50

#define CAM_CC_IFE_LITE_CLK					51

#define CAM_CC_IFE_LITE_CLK_SRC					52

#define CAM_CC_IFE_LITE_CPHY_RX_CLK				53

#define CAM_CC_IFE_LITE_CSID_CLK				54

#define CAM_CC_IFE_LITE_CSID_CLK_SRC				55

#define CAM_CC_IPE_0_AHB_CLK					56

#define CAM_CC_IPE_0_AREG_CLK					57

#define CAM_CC_IPE_0_AXI_CLK					58

#define CAM_CC_IPE_0_CLK					59

#define CAM_CC_IPE_0_CLK_SRC					60

#define CAM_CC_JPEG_CLK						61

#define CAM_CC_JPEG_CLK_SRC					62

#define CAM_CC_LRME_CLK						63

#define CAM_CC_LRME_CLK_SRC					64

#define CAM_CC_MCLK0_CLK					65

#define CAM_CC_MCLK0_CLK_SRC					66

#define CAM_CC_MCLK1_CLK					67

#define CAM_CC_MCLK1_CLK_SRC					68

#define CAM_CC_MCLK2_CLK					69

#define CAM_CC_MCLK2_CLK_SRC					70

#define CAM_CC_MCLK3_CLK					71

#define CAM_CC_MCLK3_CLK_SRC					72

#define CAM_CC_MCLK4_CLK					73

#define CAM_CC_MCLK4_CLK_SRC					74

#define CAM_CC_SLOW_AHB_CLK_SRC					75

#define CAM_CC_SOC_AHB_CLK					76

#define CAM_CC_SYS_TMR_CLK					77



#endif