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Commit eeea908a authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "Merge android-4.14.163 (1cfd8419) into msm-4.14"

parents c81bd970 84303e9b

Documentation/devicetree/bindings/clock/renesas,rcar-usb2-clock-sel.txt

+1 −1
Original line number Diff line number Diff line
@@ -46,7 +46,7 @@ Required properties: 
Example (R-Car H3):



	usb2_clksel: clock-controller@e6590630 {

		compatible = "renesas,r8a77950-rcar-usb2-clock-sel",

		compatible = "renesas,r8a7795-rcar-usb2-clock-sel",

			     "renesas,rcar-gen3-usb2-clock-sel";

		reg = <0 0xe6590630 0 0x02>;

		clocks = <&cpg CPG_MOD 703>, <&usb_extal>, <&usb_xtal>;

Makefile

+1 −1
Original line number Diff line number Diff line 
# SPDX-License-Identifier: GPL-2.0

VERSION = 4

PATCHLEVEL = 14

SUBLEVEL = 162

SUBLEVEL = 163

EXTRAVERSION =

NAME = Petit Gorille

arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts

+2 −2
Original line number Diff line number Diff line
@@ -295,7 +295,7 @@ 
};



&usb0_phy {

	status = "okay";

	status = "disabled";

	phy-supply = <&usb_otg_pwr>;

};
@@ -305,7 +305,7 @@ 
};



&usb0 {

	status = "okay";

	status = "disabled";

};



&usb1 {

arch/arm64/include/asm/pgtable-prot.h

+2 −3
Original line number Diff line number Diff line
@@ -76,13 +76,12 @@ 
#define PAGE_SHARED_EXEC	__pgprot(_PAGE_DEFAULT | PTE_USER | PTE_RDONLY | PTE_NG | PTE_PXN | PTE_WRITE)

#define PAGE_READONLY		__pgprot(_PAGE_DEFAULT | PTE_USER | PTE_RDONLY | PTE_NG | PTE_PXN | PTE_UXN)

#define PAGE_READONLY_EXEC	__pgprot(_PAGE_DEFAULT | PTE_USER | PTE_RDONLY | PTE_NG | PTE_PXN)

#define PAGE_EXECONLY		__pgprot(_PAGE_DEFAULT | PTE_RDONLY | PTE_NG | PTE_PXN)



#define __P000  PAGE_NONE

#define __P001  PAGE_READONLY

#define __P010  PAGE_READONLY

#define __P011  PAGE_READONLY

#define __P100  PAGE_EXECONLY

#define __P100  PAGE_READONLY_EXEC

#define __P101  PAGE_READONLY_EXEC

#define __P110  PAGE_READONLY_EXEC

#define __P111  PAGE_READONLY_EXEC
@@ -91,7 +90,7 @@ 
#define __S001  PAGE_READONLY

#define __S010  PAGE_SHARED

#define __S011  PAGE_SHARED

#define __S100  PAGE_EXECONLY

#define __S100  PAGE_READONLY_EXEC

#define __S101  PAGE_READONLY_EXEC

#define __S110  PAGE_SHARED_EXEC

#define __S111  PAGE_SHARED_EXEC

arch/arm64/include/asm/pgtable.h

+3 −7
Original line number Diff line number Diff line
@@ -91,12 +91,8 @@ extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)]; 
#define pte_dirty(pte)		(pte_sw_dirty(pte) || pte_hw_dirty(pte))



#define pte_valid(pte)		(!!(pte_val(pte) & PTE_VALID))

/*

 * Execute-only user mappings do not have the PTE_USER bit set. All valid

 * kernel mappings have the PTE_UXN bit set.

 */

#define pte_valid_not_user(pte) \

	((pte_val(pte) & (PTE_VALID | PTE_USER | PTE_UXN)) == (PTE_VALID | PTE_UXN))

	((pte_val(pte) & (PTE_VALID | PTE_USER)) == PTE_VALID)

#define pte_valid_young(pte) \

	((pte_val(pte) & (PTE_VALID | PTE_AF)) == (PTE_VALID | PTE_AF))

#define pte_valid_user(pte) \
@@ -112,8 +108,8 @@ extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)]; 


/*

 * p??_access_permitted() is true for valid user mappings (subject to the

 * write permission check) other than user execute-only which do not have the

 * PTE_USER bit set. PROT_NONE mappings do not have the PTE_VALID bit set.

 * write permission check). PROT_NONE mappings do not have the PTE_VALID bit

 * set.

 */

#define pte_access_permitted(pte, write) \

	(pte_valid_user(pte) && (!(write) || pte_write(pte)))