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Commit ecdbe00e authored by Zhenhua Huang's avatar Zhenhua Huang
Browse files

ARM: dts: qcom: Add iommu bus voting details for SMMU level



SMMU level entries are missing. So add it.

Change-Id: I07e1b5999acdc15b93698f8a66944328fff0a668
Signed-off-by: default avatarZhenhua Huang <zhenhuah@codeaurora.org>
parent b99e6929
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+11 −0
Original line number Diff line number Diff line
@@ -146,6 +146,17 @@
				<GIC_SPI 410 IRQ_TYPE_LEVEL_HIGH>,
				<GIC_SPI 411 IRQ_TYPE_LEVEL_HIGH>,
				<GIC_SPI 412 IRQ_TYPE_LEVEL_HIGH>;
		qcom,msm-bus,name = "apps_smmu";
		qcom,msm-bus,num-cases = <2>;
		qcom,msm-bus,active-only;
		qcom,msm-bus,num-paths = <1>;
		qcom,msm-bus,vectors-KBps =
			<MSM_BUS_MASTER_GEM_NOC_SNOC>,
			<MSM_BUS_SLAVE_IMEM_CFG>,
			<0 0>,
			<MSM_BUS_MASTER_GEM_NOC_SNOC>,
			<MSM_BUS_SLAVE_IMEM_CFG>,
			<0 1000>;

		anoc_1_tbu: anoc_1_tbu@0x15185000 {
			compatible = "qcom,qsmmuv500-tbu";