Loading arch/arm64/boot/dts/qcom/sm8150.dtsi +1 −0 Original line number Diff line number Diff line Loading @@ -3513,6 +3513,7 @@ ipa_hw: qcom,ipa@1e00000 { compatible = "qcom,ipa"; mboxes = <&qmp_aop 0>; reg = <0x1e00000 0x34000>, <0x1e04000 0x28000>; reg-names = "ipa-base", "gsi-base"; Loading drivers/platform/msm/ipa/ipa_v3/ipa.c +38 −0 Original line number Diff line number Diff line Loading @@ -6977,6 +6977,44 @@ int ipa3_get_smmu_params(struct ipa_smmu_in_params *in, return 0; } #define MAX_LEN 96 void ipa_pc_qmp_enable(void) { char buf[MAX_LEN] = "{class: bcm, res: ipa_pc, val: 1}"; struct qmp_pkt pkt; int ret = 0; /* prepare the mailbox struct */ ipa3_ctx->mbox_client.dev = &ipa3_ctx->master_pdev->dev; ipa3_ctx->mbox_client.tx_block = true; ipa3_ctx->mbox_client.tx_tout = MBOX_TOUT_MS; ipa3_ctx->mbox_client.knows_txdone = false; ipa3_ctx->mbox = mbox_request_channel(&ipa3_ctx->mbox_client, 0); if (IS_ERR(ipa3_ctx->mbox)) { ret = PTR_ERR(ipa3_ctx->mbox); if (ret != -EPROBE_DEFER) IPAERR("mailbox channel request failed, ret=%d\n", ret); goto cleanup; } /* prepare the QMP packet to send */ pkt.size = MAX_LEN; pkt.data = buf; /* send the QMP packet to AOP */ ret = mbox_send_message(ipa3_ctx->mbox, &pkt); if (ret < 0) { IPAERR("qmp message send failed, ret=%d\n", ret); goto cleanup; } cleanup: ipa3_ctx->mbox = NULL; mbox_free_channel(ipa3_ctx->mbox); } /************************************************************** * PCIe Version *************************************************************/ Loading drivers/platform/msm/ipa/ipa_v3/ipa_i.h +7 −0 Original line number Diff line number Diff line Loading @@ -36,6 +36,8 @@ #include "../ipa_common_i.h" #include "ipa_uc_offload_i.h" #include "ipa_pm.h" #include <linux/mailbox_client.h> #include <linux/mailbox/qmp.h> #define IPA_DEV_NAME_MAX_LEN 15 #define DRV_NAME "ipa" Loading Loading @@ -407,6 +409,8 @@ enum { #define IPA_TZ_UNLOCK_ATTRIBUTE 0x0C0311 #define TZ_MEM_PROTECT_REGION_ID 0x10 #define MBOX_TOUT_MS 100 struct ipa3_active_client_htable_entry { struct hlist_node list; char id_string[IPA3_ACTIVE_CLIENTS_LOG_NAME_LEN]; Loading Loading @@ -1648,6 +1652,8 @@ struct ipa3_context { bool vlan_mode_iface[IPA_VLAN_IF_MAX]; bool wdi_over_pcie; struct ipa3_wdi2_ctx wdi2_ctx; struct mbox_client mbox_client; struct mbox_chan *mbox; }; struct ipa3_plat_drv_res { Loading Loading @@ -2649,4 +2655,5 @@ int ipa3_get_transport_info( phys_addr_t *phys_addr_ptr, unsigned long *size_ptr); irq_handler_t ipa3_get_isr(void); void ipa_pc_qmp_enable(void); #endif /* _IPA3_I_H_ */ drivers/platform/msm/ipa/ipa_v3/rmnet_ipa.c +7 −0 Original line number Diff line number Diff line Loading @@ -3634,6 +3634,13 @@ void ipa3_q6_handshake_complete(bool ssr_bootup) * SSR recovery */ rmnet_ipa_get_network_stats_and_update(); } else { /* * To enable ipa power collapse we need to enable rpmh and uc * handshake So that uc can do register retention. To enable * this handshake we need to send the below message to rpmh */ ipa_pc_qmp_enable(); } imp_handle_modem_ready(); Loading Loading
arch/arm64/boot/dts/qcom/sm8150.dtsi +1 −0 Original line number Diff line number Diff line Loading @@ -3513,6 +3513,7 @@ ipa_hw: qcom,ipa@1e00000 { compatible = "qcom,ipa"; mboxes = <&qmp_aop 0>; reg = <0x1e00000 0x34000>, <0x1e04000 0x28000>; reg-names = "ipa-base", "gsi-base"; Loading
drivers/platform/msm/ipa/ipa_v3/ipa.c +38 −0 Original line number Diff line number Diff line Loading @@ -6977,6 +6977,44 @@ int ipa3_get_smmu_params(struct ipa_smmu_in_params *in, return 0; } #define MAX_LEN 96 void ipa_pc_qmp_enable(void) { char buf[MAX_LEN] = "{class: bcm, res: ipa_pc, val: 1}"; struct qmp_pkt pkt; int ret = 0; /* prepare the mailbox struct */ ipa3_ctx->mbox_client.dev = &ipa3_ctx->master_pdev->dev; ipa3_ctx->mbox_client.tx_block = true; ipa3_ctx->mbox_client.tx_tout = MBOX_TOUT_MS; ipa3_ctx->mbox_client.knows_txdone = false; ipa3_ctx->mbox = mbox_request_channel(&ipa3_ctx->mbox_client, 0); if (IS_ERR(ipa3_ctx->mbox)) { ret = PTR_ERR(ipa3_ctx->mbox); if (ret != -EPROBE_DEFER) IPAERR("mailbox channel request failed, ret=%d\n", ret); goto cleanup; } /* prepare the QMP packet to send */ pkt.size = MAX_LEN; pkt.data = buf; /* send the QMP packet to AOP */ ret = mbox_send_message(ipa3_ctx->mbox, &pkt); if (ret < 0) { IPAERR("qmp message send failed, ret=%d\n", ret); goto cleanup; } cleanup: ipa3_ctx->mbox = NULL; mbox_free_channel(ipa3_ctx->mbox); } /************************************************************** * PCIe Version *************************************************************/ Loading
drivers/platform/msm/ipa/ipa_v3/ipa_i.h +7 −0 Original line number Diff line number Diff line Loading @@ -36,6 +36,8 @@ #include "../ipa_common_i.h" #include "ipa_uc_offload_i.h" #include "ipa_pm.h" #include <linux/mailbox_client.h> #include <linux/mailbox/qmp.h> #define IPA_DEV_NAME_MAX_LEN 15 #define DRV_NAME "ipa" Loading Loading @@ -407,6 +409,8 @@ enum { #define IPA_TZ_UNLOCK_ATTRIBUTE 0x0C0311 #define TZ_MEM_PROTECT_REGION_ID 0x10 #define MBOX_TOUT_MS 100 struct ipa3_active_client_htable_entry { struct hlist_node list; char id_string[IPA3_ACTIVE_CLIENTS_LOG_NAME_LEN]; Loading Loading @@ -1648,6 +1652,8 @@ struct ipa3_context { bool vlan_mode_iface[IPA_VLAN_IF_MAX]; bool wdi_over_pcie; struct ipa3_wdi2_ctx wdi2_ctx; struct mbox_client mbox_client; struct mbox_chan *mbox; }; struct ipa3_plat_drv_res { Loading Loading @@ -2649,4 +2655,5 @@ int ipa3_get_transport_info( phys_addr_t *phys_addr_ptr, unsigned long *size_ptr); irq_handler_t ipa3_get_isr(void); void ipa_pc_qmp_enable(void); #endif /* _IPA3_I_H_ */
drivers/platform/msm/ipa/ipa_v3/rmnet_ipa.c +7 −0 Original line number Diff line number Diff line Loading @@ -3634,6 +3634,13 @@ void ipa3_q6_handshake_complete(bool ssr_bootup) * SSR recovery */ rmnet_ipa_get_network_stats_and_update(); } else { /* * To enable ipa power collapse we need to enable rpmh and uc * handshake So that uc can do register retention. To enable * this handshake we need to send the below message to rpmh */ ipa_pc_qmp_enable(); } imp_handle_modem_ready(); Loading