Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit ebeec0af authored Jul 18, 2013 by Laurent Pinchart Committed by Thierry Reding Sep 03, 2013

pwm: Update DT bindings to reference pwm.txt for cells documentation



The PWM client cells format is documented in the generic pwm.txt
documentation and duplicated in all PWM driver bindings. Remove
duplicate information and reference pwm.txt instead.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>

parent 208be769

Documentation/devicetree/bindings/pwm/atmel-tcb-pwm.txt

+3 −5

Original line number	Diff line number	Diff line
		@@ -2,11 +2,9 @@ Atmel TCB PWM controller

		Required properties:
		- compatible: should be "atmel,tcb-pwm"
		- #pwm-cells: Should be 3. The first cell specifies the per-chip index
		of the PWM to use, the second cell is the period in nanoseconds and
		bit 0 in the third cell is used to encode the polarity of PWM output.
		Set bit 0 of the third cell in PWM specifier to 1 for inverse polarity &
		set to 0 for normal polarity.
		- #pwm-cells: should be 3. See pwm.txt in this directory for a description of
		the cells format. The only third cell flag supported by this binding is
		PWM_POLARITY_INVERTED.
		- tc-block: The Timer Counter block to use as a PWM chip.

		Example:

Documentation/devicetree/bindings/pwm/imx-pwm.txt

+2 −2

Original line number	Diff line number	Diff line
		@@ -3,8 +3,8 @@ Freescale i.MX PWM controller
		Required properties:
		- compatible: should be "fsl,<soc>-pwm"
		- reg: physical base address and length of the controller's registers
		- #pwm-cells: should be 2. The first cell specifies the per-chip index
		of the PWM to use and the second cell is the period in nanoseconds.
		- #pwm-cells: should be 2. See pwm.txt in this directory for a description of
		the cells format.
		- interrupts: The interrupt for the pwm controller

		Example:

Documentation/devicetree/bindings/pwm/mxs-pwm.txt

+2 −2

Original line number	Diff line number	Diff line
		@@ -3,8 +3,8 @@ Freescale MXS PWM controller
		Required properties:
		- compatible: should be "fsl,imx23-pwm"
		- reg: physical base address and length of the controller's registers
		- #pwm-cells: should be 2. The first cell specifies the per-chip index
		of the PWM to use and the second cell is the period in nanoseconds.
		- #pwm-cells: should be 2. See pwm.txt in this directory for a description of
		the cells format.
		- fsl,pwm-number: the number of PWM devices

		Example:

Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt

+2 −3

Original line number	Diff line number	Diff line
		@@ -5,9 +5,8 @@ Required properties:
		- "nvidia,tegra20-pwm"
		- "nvidia,tegra30-pwm"
		- reg: physical base address and length of the controller's registers
		- #pwm-cells: On Tegra the number of cells used to specify a PWM is 2. The
		first cell specifies the per-chip index of the PWM to use and the second
		cell is the period in nanoseconds.
		- #pwm-cells: should be 2. See pwm.txt in this directory for a description of
		the cells format.

		Example:

Documentation/devicetree/bindings/pwm/nxp,pca9685-pwm.txt

+2 −2

Original line number	Diff line number	Diff line
		@@ -3,8 +3,8 @@ NXP PCA9685 16-channel 12-bit PWM LED controller

		Required properties:
		- compatible: "nxp,pca9685-pwm"
		- #pwm-cells: should be 2. The first cell specifies the per-chip index
		of the PWM to use and the second cell is the period in nanoseconds.
		- #pwm-cells: Should be 2. See pwm.txt in this directory for a description of
		the cells format.
		The index 16 is the ALLCALL channel, that sets all PWM channels at the same
		time.