Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit eb522df4 authored by weiyi.lu@mediatek.com's avatar weiyi.lu@mediatek.com Committed by Stephen Boyd
Browse files

dt-bindings: ARM: Mediatek: Document bindings for MT2712 



This patch adds the binding documentation for apmixedsys, bdpsys,
imgsys, imgsys, infracfg, mcucfg, mfgcfg, mmsys, pericfg, topckgen,
vdecsys and vencsys for Mediatek MT2712.

Acked-by: default avatarRob Herring <robh@kernel.org>
Signed-off-by: default avatarWeiyi Lu <weiyi.lu@mediatek.com>
Signed-off-by: default avatarStephen Boyd <sboyd@codeaurora.org>
parent 2bd6bf03

Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt

+1 −0
Original line number Diff line number Diff line
@@ -7,6 +7,7 @@ Required Properties: 


- compatible: Should be one of:

	- "mediatek,mt2701-apmixedsys"

	- "mediatek,mt2712-apmixedsys", "syscon"

	- "mediatek,mt6797-apmixedsys"

	- "mediatek,mt8135-apmixedsys"

	- "mediatek,mt8173-apmixedsys"

Documentation/devicetree/bindings/arm/mediatek/mediatek,bdpsys.txt

+1 −0
Original line number Diff line number Diff line
@@ -7,6 +7,7 @@ Required Properties: 


- compatible: Should be:

	- "mediatek,mt2701-bdpsys", "syscon"

	- "mediatek,mt2712-bdpsys", "syscon"

- #clock-cells: Must be 1



The bdpsys controller uses the common clk binding from

Documentation/devicetree/bindings/arm/mediatek/mediatek,imgsys.txt

+1 −0
Original line number Diff line number Diff line
@@ -7,6 +7,7 @@ Required Properties: 


- compatible: Should be one of:

	- "mediatek,mt2701-imgsys", "syscon"

	- "mediatek,mt2712-imgsys", "syscon"

	- "mediatek,mt6797-imgsys", "syscon"

	- "mediatek,mt8173-imgsys", "syscon"

- #clock-cells: Must be 1

Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt

+1 −0
Original line number Diff line number Diff line
@@ -8,6 +8,7 @@ Required Properties: 


- compatible: Should be one of:

	- "mediatek,mt2701-infracfg", "syscon"

	- "mediatek,mt2712-infracfg", "syscon"

	- "mediatek,mt6797-infracfg", "syscon"

	- "mediatek,mt8135-infracfg", "syscon"

	- "mediatek,mt8173-infracfg", "syscon"

Documentation/devicetree/bindings/arm/mediatek/mediatek,jpgdecsys.txt

0 → 100644
+22 −0
Original line number Diff line number Diff line 
Mediatek jpgdecsys controller

============================



The Mediatek jpgdecsys controller provides various clocks to the system.



Required Properties:



- compatible: Should be:

	- "mediatek,mt2712-jpgdecsys", "syscon"

- #clock-cells: Must be 1



The jpgdecsys controller uses the common clk binding from

Documentation/devicetree/bindings/clock/clock-bindings.txt

The available clocks are defined in dt-bindings/clock/mt*-clk.h.



Example:



jpgdecsys: syscon@19000000 {

	compatible = "mediatek,mt2712-jpgdecsys", "syscon";

	reg = <0 0x19000000 0 0x1000>;

	#clock-cells = <1>;

};