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Commit e988e2dd authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "ARM: dts: msm: add dp dt node for atoll target"

parents 019eaeb4 46754ebc

arch/arm64/boot/dts/qcom/atoll-audio.dtsi

+10 −0
Original line number Diff line number Diff line
@@ -170,6 +170,16 @@ 
				"msm-dai-cdc-dma-dev.45116",

				"msm-dai-cdc-dma-dev.45118",

				"msm-dai-q6-dev.24577";

		fsa4480-i2c-handle = <&fsa4480>;

	};

};



&qupv3_se9_i2c {

	status = "ok";

	fsa4480: fsa4480@42 {

		compatible = "qcom,fsa4480-i2c";

		reg = <0x42>;

		pinctrl-names = "default";

		pinctrl-0 = <&fsa_usbc_ana_en>;

	};

};

arch/arm64/boot/dts/qcom/atoll-pinctrl.dtsi

+27 −0
Original line number Diff line number Diff line
@@ -218,6 +218,33 @@ 
			};

		};



		sde_dp_usbplug_cc_suspend: sde_dp_cc_suspend {

			mux {

				pins = "gpio104";

				function = "gpio";



			};



			config {

				pins = "gpio104";

				bias-pull-down;

				drive-strength = <2>;

			};

		};



		sde_dp_usbplug_cc_active: sde_dp_usbplug_cc_active {

			mux {

				pins = "gpio104";

				function = "gpio";

			};



			config {

				pins = "gpio104";

				bias-disable;

				drive-strength = <16>;

			};

		};



		qupv3_se0_spi_pins: qupv3_se0_spi_pins {

			qupv3_se0_spi_active: qupv3_se0_spi_active {

				mux {

arch/arm64/boot/dts/qcom/atoll-sde-display.dtsi

+21 −1
Original line number Diff line number Diff line
@@ -133,10 +133,30 @@ 
		cell-index = <0>;

		label = "wb_display";

	};

	ext_disp: qcom,msm-ext-disp {

		compatible = "qcom,msm-ext-disp";



		ext_disp_audio_codec: qcom,msm-ext-disp-audio-codec-rx {

			compatible = "qcom,msm-ext-disp-audio-codec-rx";

		};

	};



};



&sde_dp {

	qcom,dp-usbpd-detection = <&pm6150_pdphy>;

	qcom,ext-disp = <&ext_disp>;

	qcom,dp-aux-switch = <&fsa4480>;



	qcom,usbplug-cc-gpio = <&tlmm 104 0>;



	pinctrl-name = "mdss_dp_active", "mdss_dp_sleep";

	pinctrl-0 = <&sde_dp_usbplug_cc_active>;

	pinctrl-1 = <&sde_dp_usbplug_cc_suspend>;

};



&mdss_mdp {

	connectors = <&sde_wb &sde_dsi>;

	connectors = <&sde_wb &sde_dsi &sde_dp>;

};



&dsi_rm69299_visionox_amoled_video {

arch/arm64/boot/dts/qcom/atoll-sde-pll.dtsi

+0 −1
Original line number Diff line number Diff line
@@ -41,7 +41,6 @@ 
	};



	mdss_dp_pll: qcom,mdss_dp_pll@ae90000 {

		status = "disabled";

		compatible = "qcom,mdss_dp_pll_10nm";

		label = "MDSS DP PLL";

		cell-index = <0>;

arch/arm64/boot/dts/qcom/atoll-sde.dtsi

+36 −17
Original line number Diff line number Diff line
@@ -489,24 +489,26 @@ 
	};



	sde_dp: qcom,dp_display@ae90000 {

		status = "disabled";

		status = "ok";

		cell-index = <0>;

		compatible = "qcom,dp-display";



		vdda-lp2-supply = <&L9A>;

		reg =	<0xae90000 0x0dc>,

			<0xae90200 0x0c0>,

			<0xae90400 0x508>,

			<0xae91000 0x094>,

			<0x88eaa00 0x198>,

			<0x88ea200 0x150>,

			<0x88ea600 0x150>,

			<0xaf02000 0x2c4>,

		vdda-1p2-supply = <&L3C>;

		vdda-0p9-supply = <&L4A>;



		reg =	<0xae90000 0x200>,

			<0xae90200 0x200>,

			<0xae90400 0xc00>,

			<0xae91000 0x400>,

			<0x88eaa00 0x200>,

			<0x88ea200 0x200>,

			<0x88ea600 0x200>,

			<0xaf02000 0x2d0>,

			<0x780000 0x6228>,

			<0x88ea040 0x10>,

			<0x88ea030 0x10>,

			<0x88e8000 0x20>,

			<0x0aee1000 0x2a>,

			<0xae91400 0x095>;

			<0xae91400 0x400>;

		reg-names =	"dp_ahb", "dp_aux", "dp_link",

				"dp_p0", "dp_phy", "dp_ln_tx0", "dp_ln_tx1",

				"dp_mmss_cc", "qfprom_physical", "dp_pll",
@@ -515,20 +517,37 @@ 
		interrupt-parent = <&mdss_mdp>;

		interrupts = <12 0>;



		qcom,phy-version = <0x420>;

		qcom,aux-cfg0-settings = [20 00];

		qcom,aux-cfg1-settings = [24 13];

		qcom,aux-cfg2-settings = [28 A4];

		qcom,aux-cfg1-settings = [24 13 23 1d];

		qcom,aux-cfg2-settings = [28 24];

		qcom,aux-cfg3-settings = [2c 00];

		qcom,aux-cfg4-settings = [30 0a];

		qcom,aux-cfg5-settings = [34 26];

		qcom,aux-cfg6-settings = [38 0a];

		qcom,aux-cfg7-settings = [3c 03];

		qcom,aux-cfg8-settings = [40 b7];

		qcom,aux-cfg8-settings = [40 bb];

		qcom,aux-cfg9-settings = [44 03];



		qcom,max-pclk-frequency-khz = <675000>;



	clocks =	<&clock_dispcc DISP_CC_MDSS_DP_AUX_CLK>,

			<&clock_gcc GCC_USB3_PRIM_PHY_PIPE_CLK>,

			<&clock_rpmh RPMH_CXO_CLK>,

			<&clock_gcc GCC_USB3_PRIM_CLKREF_CLK>,

			<&clock_gcc GCC_USB3_PRIM_PHY_PIPE_CLK>,

			<&clock_dispcc DISP_CC_MDSS_DP_LINK_CLK>,

			<&clock_dispcc DISP_CC_MDSS_DP_LINK_INTF_CLK>,

			<&clock_dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC>,

			<&mdss_dp_pll DP_VCO_DIVIDED_CLK_SRC_MUX>,

			<&clock_dispcc DISP_CC_MDSS_DP_PIXEL_CLK>;



	clock-names =   "core_aux_clk", "core_usb_pipe_clk",

			"core_usb_ref_clk_src",

			"core_usb_ref_clk", "core_usb_pipe_clk",

			"link_clk", "link_iface_clk",

			"pixel_clk_rcg", "pixel_parent",

			"strm0_pixel_clk";



		qcom,ctrl-supply-entries {

			#address-cells = <1>;

			#size-cells = <0>;
@@ -551,7 +570,7 @@ 
				reg = <0>;

				qcom,supply-name = "vdda-0p9";

				qcom,supply-min-voltage = <880000>;

				qcom,supply-max-voltage = <880000>;

				qcom,supply-max-voltage = <900000>;

				qcom,supply-enable-load = <36000>;

				qcom,supply-disable-load = <0>;

			};