Loading arch/arm64/boot/dts/qcom/atoll.dtsi +1 −1 Original line number Diff line number Diff line Loading @@ -1712,8 +1712,8 @@ <0x18325800 0x1400>; reg-names = "osm_l3_base", "osm_pwrcl_base", "osm_perfcl_base"; l3-devs = <&cpu0_cpu_l3_lat &cpu6_cpu_l3_lat>; #clock-cells = <1>; status = "disabled"; }; cpucc_debug: syscon@182a0018 { Loading Loading
arch/arm64/boot/dts/qcom/atoll.dtsi +1 −1 Original line number Diff line number Diff line Loading @@ -1712,8 +1712,8 @@ <0x18325800 0x1400>; reg-names = "osm_l3_base", "osm_pwrcl_base", "osm_perfcl_base"; l3-devs = <&cpu0_cpu_l3_lat &cpu6_cpu_l3_lat>; #clock-cells = <1>; status = "disabled"; }; cpucc_debug: syscon@182a0018 { Loading