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Commit e9189e66 authored by Sergei Shtylyov's avatar Sergei Shtylyov Committed by Simon Horman
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ARM: dts: sk-rzg1e: initial device tree 



Add the initial  device tree for the R8A7745 SoC based SK-RZG1E board.
The board has 1  debug  serial  port (SCIF2); include support for it,
so that the serial console can  work.

Based on the original (and large) patch by Dmitry Shifrin
<dmitry.shifrin@cogentembedded.com>.

Signed-off-by: default avatarSergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
parent 28c43fbb

arch/arm/boot/dts/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -678,6 +678,7 @@ dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += \ 
	r8a73a4-ape6evm.dtb \

	r8a7740-armadillo800eva.dtb \

	r8a7743-sk-rzg1m.dtb \

	r8a7745-sk-rzg1e.dtb \

	r8a7778-bockw.dtb \

	r8a7779-marzen.dtb \

	r8a7790-lager.dtb \

arch/arm/boot/dts/r8a7745-sk-rzg1e.dts

0 → 100644
+39 −0
Original line number Diff line number Diff line 
/*

 * Device Tree Source for the SK-RZG1E board

 *

 * Copyright (C) 2016 Cogent Embedded, Inc.

 *

 * This file is licensed under the terms of the GNU General Public License

 * version 2. This program is licensed "as is" without any warranty of any

 * kind, whether express or implied.

 */



/dts-v1/;

#include "r8a7745.dtsi"



/ {

	model = "SK-RZG1E";

	compatible = "renesas,sk-rzg1e", "renesas,r8a7745";



	aliases {

		serial0 = &scif2;

	};



	chosen {

		bootargs = "ignore_loglevel";

		stdout-path = "serial0:115200n8";

	};



	memory@40000000 {

		device_type = "memory";

		reg = <0 0x40000000 0 0x40000000>;

	};

};



&extal_clk {

	clock-frequency = <20000000>;

};



&scif2 {

	status = "okay";

};