Loading arch/arm64/boot/dts/qcom/sm6150-gpu.dtsi +28 −0 Original line number Diff line number Diff line Loading @@ -416,4 +416,32 @@ iommus = <&kgsl_smmu 0x2 0x400>; }; }; rgmu: qcom,rgmu@0x0506d000 { label = "kgsl-rgmu"; compatible = "qcom,gpu-rgmu"; reg = <0x506d000 0x31000>; reg-names = "kgsl_rgmu"; interrupts = <0 304 0>, <0 305 0>; interrupt-names = "kgsl_oob", "kgsl_rgmu"; regulator-names = "vddcx", "vdd"; vddcx-supply = <&gpu_cx_gdsc>; vdd-supply = <&gpu_gx_gdsc>; clocks = <&clock_gpucc GPU_CC_CX_GMU_CLK>, <&clock_gpucc GPU_CC_CXO_CLK>, <&clock_gcc GCC_DDRSS_GPU_AXI_CLK>, <&clock_gpucc GPU_CC_AHB_CLK>, <&clock_gcc GCC_GPU_MEMNOC_GFX_CLK>, <&clock_gcc GCC_GPU_SNOC_DVM_GFX_CLK>, <&clock_gpucc GPU_CC_GX_GFX3D_CLK>; clock-names = "gmu", "rbbmtimer", "mem", "iface", "mem_iface", "alt_mem_iface", "core"; }; }; Loading
arch/arm64/boot/dts/qcom/sm6150-gpu.dtsi +28 −0 Original line number Diff line number Diff line Loading @@ -416,4 +416,32 @@ iommus = <&kgsl_smmu 0x2 0x400>; }; }; rgmu: qcom,rgmu@0x0506d000 { label = "kgsl-rgmu"; compatible = "qcom,gpu-rgmu"; reg = <0x506d000 0x31000>; reg-names = "kgsl_rgmu"; interrupts = <0 304 0>, <0 305 0>; interrupt-names = "kgsl_oob", "kgsl_rgmu"; regulator-names = "vddcx", "vdd"; vddcx-supply = <&gpu_cx_gdsc>; vdd-supply = <&gpu_gx_gdsc>; clocks = <&clock_gpucc GPU_CC_CX_GMU_CLK>, <&clock_gpucc GPU_CC_CXO_CLK>, <&clock_gcc GCC_DDRSS_GPU_AXI_CLK>, <&clock_gpucc GPU_CC_AHB_CLK>, <&clock_gcc GCC_GPU_MEMNOC_GFX_CLK>, <&clock_gcc GCC_GPU_SNOC_DVM_GFX_CLK>, <&clock_gpucc GPU_CC_GX_GFX3D_CLK>; clock-names = "gmu", "rbbmtimer", "mem", "iface", "mem_iface", "alt_mem_iface", "core"; }; };