Loading drivers/gpu/msm/adreno_a6xx_gmu.c +0 −1 Original line number Diff line number Diff line Loading @@ -1392,7 +1392,6 @@ static void a6xx_gmu_snapshot(struct adreno_device *adreno_dev, struct gmu_mem_type_desc desc[] = { {gmu->hfi_mem, SNAPSHOT_GMU_HFIMEM}, {gmu->gmu_log, SNAPSHOT_GMU_LOG}, {gmu->bw_mem, SNAPSHOT_GMU_BWMEM}, {gmu->dump_mem, SNAPSHOT_GMU_DUMPMEM} }; unsigned int val, i; Loading drivers/gpu/msm/kgsl_gmu.c +28 −57 Original line number Diff line number Diff line Loading @@ -359,7 +359,6 @@ static void gmu_kmem_close(struct gmu_device *gmu) struct gmu_iommu_context *ctx = &gmu_ctx[GMU_CONTEXT_KERNEL]; gmu->hfi_mem = NULL; gmu->bw_mem = NULL; gmu->dump_mem = NULL; gmu->gmu_log = NULL; Loading Loading @@ -459,13 +458,6 @@ static int gmu_memory_probe(struct kgsl_device *device, goto err_ret; } gmu->bw_mem = allocate_gmu_kmem(gmu, GMU_NONCACHED_KERNEL, BWMEM_SIZE, IOMMU_READ); if (IS_ERR(gmu->bw_mem)) { ret = PTR_ERR(gmu->bw_mem); goto err_ret; } /* Allocates & maps GMU crash dump memory */ if (adreno_is_a630(adreno_dev)) { gmu->dump_mem = allocate_gmu_kmem(gmu, GMU_NONCACHED_KERNEL, Loading Loading @@ -794,33 +786,35 @@ static void build_rpmh_bw_votes(struct gmu_bw_votes *rpmh_vote, } } /* TODO: Remove this and use the actual bus API */ #define GET_IB_VAL(i) ((i) & 0x3FFF) #define GET_AB_VAL(i) (((i) >> 14) & 0x3FFF) static void build_rpmh_bw_buf(struct gmu_device *gmu) static void build_bwtable_cmd_cache(struct gmu_device *gmu) { struct hfi_bwbuf *bwbuf = gmu->bw_mem->hostptr; struct hfi_bwtable_cmd *cmd = &gmu->hfi.bwtbl_cmd; struct rpmh_votes_t *votes = &gmu->rpmh_votes; unsigned int i, val; unsigned int i, j; /* TODO: wait for IB/AB query API ready */ cmd->hdr = 0xFFFFFFFF; cmd->bw_level_num = gmu->num_bwlevels; cmd->cnoc_cmds_num = votes->cnoc_votes.cmds_per_bw_vote; cmd->cnoc_wait_bitmask = votes->cnoc_votes.cmds_wait_bitmask; cmd->ddr_cmds_num = votes->ddr_votes.cmds_per_bw_vote; cmd->ddr_wait_bitmask = votes->ddr_votes.cmds_wait_bitmask; /* Build from DDR votes in case IB/AB query API fail */ for (i = 0; i < gmu->num_bwlevels; i++) { /* FIXME: wait for HPG to specify which node has IB/AB * node 0 for now */ /* Get IB val */ val = GET_IB_VAL(votes->ddr_votes.cmd_data[i][0]); /* If IB val not set, use AB val */ if (val == 0) val = GET_AB_VAL(votes->ddr_votes.cmd_data[i][0]); for (i = 0; i < cmd->ddr_cmds_num; i++) cmd->ddr_cmd_addrs[i] = votes->ddr_votes.cmd_addrs[i]; /* Set only vote data */ bwbuf->arr[i] &= 0xFFFF; bwbuf->arr[i] |= (val << 16); } for (i = 0; i < cmd->bw_level_num; i++) for (j = 0; j < cmd->ddr_cmds_num; j++) cmd->ddr_cmd_data[i][j] = votes->ddr_votes.cmd_data[i][j]; for (i = 0; i < cmd->cnoc_cmds_num; i++) cmd->cnoc_cmd_addrs[i] = votes->cnoc_votes.cmd_addrs[i]; for (i = 0; i < MAX_CNOC_LEVELS; i++) for (j = 0; j < cmd->cnoc_cmds_num; j++) cmd->cnoc_cmd_data[i][j] = votes->cnoc_votes.cmd_data[i][j]; } /* Loading Loading @@ -860,7 +854,7 @@ static int gmu_bus_vote_init(struct gmu_device *gmu, struct kgsl_pwrctrl *pwr) build_rpmh_bw_votes(&votes->cnoc_votes, gmu->num_cnocbwlevels, hdl); build_rpmh_bw_buf(gmu); build_bwtable_cmd_cache(gmu); out: kfree(usecases); Loading Loading @@ -1056,10 +1050,6 @@ static int gmu_clocks_probe(struct gmu_device *gmu, struct device_node *node) static int gmu_gpu_bw_probe(struct kgsl_device *device, struct gmu_device *gmu) { struct msm_bus_scale_pdata *bus_scale_table; struct msm_bus_paths *usecase; struct msm_bus_vectors *vector; struct hfi_bwbuf *bwbuf = gmu->bw_mem->hostptr; int i; bus_scale_table = msm_bus_cl_get_pdata(device->pdev); if (bus_scale_table == NULL) { Loading @@ -1074,25 +1064,6 @@ static int gmu_gpu_bw_probe(struct kgsl_device *device, struct gmu_device *gmu) return -ENODEV; } /* 0-15: num levels; 16-31: arr offset in bytes */ bwbuf->hdr[0] = (12 << 16) | (bus_scale_table->num_usecases & 0xFFFF); /* 0-15: element size in bytes; 16-31: data size in bytes */ bwbuf->hdr[1] = (2 << 16) | 4; /* 0-15: bw val offset in bytes; 16-31: vote data offset in bytes */ bwbuf->hdr[2] = (2 << 16) | 0; for (i = 0; i < bus_scale_table->num_usecases; i++) { usecase = &bus_scale_table->usecase[i]; vector = &usecase->vectors[0]; /* Clear bw val */ bwbuf->arr[i] &= 0xFFFF0000; /* Set bw val if not first entry */ if (i) bwbuf->arr[i] |= (DIV_ROUND_UP_ULL(vector->ib, 1048576) & 0xFFFF); } return 0; } Loading drivers/gpu/msm/kgsl_gmu.h +0 −2 Original line number Diff line number Diff line Loading @@ -132,7 +132,6 @@ struct kgsl_mailbox { * @gmu_interrupt_num: GMU interrupt number * @fw_image: GMU FW image * @hfi_mem: pointer to HFI shared memory * @bw_mem: pointer to BW data indirect buffer memory * @dump_mem: pointer to GMU debug dump memory * @gmu_log: gmu event log memory * @hfi: HFI controller Loading Loading @@ -169,7 +168,6 @@ struct gmu_device { unsigned int gmu_interrupt_num; const struct firmware *fw_image; struct gmu_memdesc *hfi_mem; struct gmu_memdesc *bw_mem; struct gmu_memdesc *dump_mem; struct gmu_memdesc *gmu_log; struct kgsl_hfi hfi; Loading drivers/gpu/msm/kgsl_hfi.c +3 −28 Original line number Diff line number Diff line Loading @@ -490,36 +490,11 @@ static int hfi_send_dcvstbl(struct gmu_device *gmu) static int hfi_send_bwtbl(struct gmu_device *gmu) { struct hfi_bwtable_cmd cmd = { .hdr = CMD_MSG_HDR(H2F_MSG_BW_VOTE_TBL, sizeof(cmd)), .bw_level_num = gmu->num_bwlevels, .cnoc_cmds_num = gmu->rpmh_votes.cnoc_votes.cmds_per_bw_vote, .cnoc_wait_bitmask = gmu->rpmh_votes.cnoc_votes.cmds_wait_bitmask, .ddr_cmds_num = gmu->rpmh_votes.ddr_votes.cmds_per_bw_vote, .ddr_wait_bitmask = gmu->rpmh_votes.ddr_votes.cmds_wait_bitmask, }; int i, j; for (i = 0; i < cmd.ddr_cmds_num; i++) cmd.ddr_cmd_addrs[i] = gmu->rpmh_votes.ddr_votes.cmd_addrs[i]; for (i = 0; i < cmd.bw_level_num; i++) for (j = 0; j < cmd.ddr_cmds_num; j++) cmd.ddr_cmd_data[i][j] = gmu->rpmh_votes.ddr_votes.cmd_data[i][j]; struct hfi_bwtable_cmd *cmd = &gmu->hfi.bwtbl_cmd; for (i = 0; i < cmd.cnoc_cmds_num; i++) cmd.cnoc_cmd_addrs[i] = gmu->rpmh_votes.cnoc_votes.cmd_addrs[i]; cmd->hdr = CMD_MSG_HDR(H2F_MSG_BW_VOTE_TBL, sizeof(*cmd)); for (i = 0; i < MAX_CNOC_LEVELS; i++) for (j = 0; j < cmd.cnoc_cmds_num; j++) cmd.cnoc_cmd_data[i][j] = gmu->rpmh_votes.cnoc_votes.cmd_data[i][j]; return hfi_send_generic_req(gmu, HFI_CMD_IDX, &cmd); return hfi_send_generic_req(gmu, HFI_CMD_IDX, cmd); } static int hfi_send_test(struct gmu_device *gmu) Loading drivers/gpu/msm/kgsl_hfi.h +2 −5 Original line number Diff line number Diff line Loading @@ -247,11 +247,6 @@ struct hfi_bwtable_cmd { uint32_t ddr_cmd_data[MAX_GX_LEVELS][MAX_BW_CMDS]; }; struct hfi_bwbuf { uint32_t hdr[3]; uint32_t arr[NUM_BW_LEVELS]; }; struct opp_gx_desc { uint32_t vote; uint32_t acd; Loading Loading @@ -617,6 +612,7 @@ struct pending_cmd { * @version: HFI version number provided * @seqnum: atomic counter that is incremented for each message sent. The * value of the counter is used as sequence number for HFI message * @bwtbl_cmd: HFI BW table buffer */ struct kgsl_hfi { struct kgsl_device *kgsldev; Loading @@ -627,6 +623,7 @@ struct kgsl_hfi { struct tasklet_struct tasklet; uint32_t version; atomic_t seqnum; struct hfi_bwtable_cmd bwtbl_cmd; }; struct gmu_device; Loading Loading
drivers/gpu/msm/adreno_a6xx_gmu.c +0 −1 Original line number Diff line number Diff line Loading @@ -1392,7 +1392,6 @@ static void a6xx_gmu_snapshot(struct adreno_device *adreno_dev, struct gmu_mem_type_desc desc[] = { {gmu->hfi_mem, SNAPSHOT_GMU_HFIMEM}, {gmu->gmu_log, SNAPSHOT_GMU_LOG}, {gmu->bw_mem, SNAPSHOT_GMU_BWMEM}, {gmu->dump_mem, SNAPSHOT_GMU_DUMPMEM} }; unsigned int val, i; Loading
drivers/gpu/msm/kgsl_gmu.c +28 −57 Original line number Diff line number Diff line Loading @@ -359,7 +359,6 @@ static void gmu_kmem_close(struct gmu_device *gmu) struct gmu_iommu_context *ctx = &gmu_ctx[GMU_CONTEXT_KERNEL]; gmu->hfi_mem = NULL; gmu->bw_mem = NULL; gmu->dump_mem = NULL; gmu->gmu_log = NULL; Loading Loading @@ -459,13 +458,6 @@ static int gmu_memory_probe(struct kgsl_device *device, goto err_ret; } gmu->bw_mem = allocate_gmu_kmem(gmu, GMU_NONCACHED_KERNEL, BWMEM_SIZE, IOMMU_READ); if (IS_ERR(gmu->bw_mem)) { ret = PTR_ERR(gmu->bw_mem); goto err_ret; } /* Allocates & maps GMU crash dump memory */ if (adreno_is_a630(adreno_dev)) { gmu->dump_mem = allocate_gmu_kmem(gmu, GMU_NONCACHED_KERNEL, Loading Loading @@ -794,33 +786,35 @@ static void build_rpmh_bw_votes(struct gmu_bw_votes *rpmh_vote, } } /* TODO: Remove this and use the actual bus API */ #define GET_IB_VAL(i) ((i) & 0x3FFF) #define GET_AB_VAL(i) (((i) >> 14) & 0x3FFF) static void build_rpmh_bw_buf(struct gmu_device *gmu) static void build_bwtable_cmd_cache(struct gmu_device *gmu) { struct hfi_bwbuf *bwbuf = gmu->bw_mem->hostptr; struct hfi_bwtable_cmd *cmd = &gmu->hfi.bwtbl_cmd; struct rpmh_votes_t *votes = &gmu->rpmh_votes; unsigned int i, val; unsigned int i, j; /* TODO: wait for IB/AB query API ready */ cmd->hdr = 0xFFFFFFFF; cmd->bw_level_num = gmu->num_bwlevels; cmd->cnoc_cmds_num = votes->cnoc_votes.cmds_per_bw_vote; cmd->cnoc_wait_bitmask = votes->cnoc_votes.cmds_wait_bitmask; cmd->ddr_cmds_num = votes->ddr_votes.cmds_per_bw_vote; cmd->ddr_wait_bitmask = votes->ddr_votes.cmds_wait_bitmask; /* Build from DDR votes in case IB/AB query API fail */ for (i = 0; i < gmu->num_bwlevels; i++) { /* FIXME: wait for HPG to specify which node has IB/AB * node 0 for now */ /* Get IB val */ val = GET_IB_VAL(votes->ddr_votes.cmd_data[i][0]); /* If IB val not set, use AB val */ if (val == 0) val = GET_AB_VAL(votes->ddr_votes.cmd_data[i][0]); for (i = 0; i < cmd->ddr_cmds_num; i++) cmd->ddr_cmd_addrs[i] = votes->ddr_votes.cmd_addrs[i]; /* Set only vote data */ bwbuf->arr[i] &= 0xFFFF; bwbuf->arr[i] |= (val << 16); } for (i = 0; i < cmd->bw_level_num; i++) for (j = 0; j < cmd->ddr_cmds_num; j++) cmd->ddr_cmd_data[i][j] = votes->ddr_votes.cmd_data[i][j]; for (i = 0; i < cmd->cnoc_cmds_num; i++) cmd->cnoc_cmd_addrs[i] = votes->cnoc_votes.cmd_addrs[i]; for (i = 0; i < MAX_CNOC_LEVELS; i++) for (j = 0; j < cmd->cnoc_cmds_num; j++) cmd->cnoc_cmd_data[i][j] = votes->cnoc_votes.cmd_data[i][j]; } /* Loading Loading @@ -860,7 +854,7 @@ static int gmu_bus_vote_init(struct gmu_device *gmu, struct kgsl_pwrctrl *pwr) build_rpmh_bw_votes(&votes->cnoc_votes, gmu->num_cnocbwlevels, hdl); build_rpmh_bw_buf(gmu); build_bwtable_cmd_cache(gmu); out: kfree(usecases); Loading Loading @@ -1056,10 +1050,6 @@ static int gmu_clocks_probe(struct gmu_device *gmu, struct device_node *node) static int gmu_gpu_bw_probe(struct kgsl_device *device, struct gmu_device *gmu) { struct msm_bus_scale_pdata *bus_scale_table; struct msm_bus_paths *usecase; struct msm_bus_vectors *vector; struct hfi_bwbuf *bwbuf = gmu->bw_mem->hostptr; int i; bus_scale_table = msm_bus_cl_get_pdata(device->pdev); if (bus_scale_table == NULL) { Loading @@ -1074,25 +1064,6 @@ static int gmu_gpu_bw_probe(struct kgsl_device *device, struct gmu_device *gmu) return -ENODEV; } /* 0-15: num levels; 16-31: arr offset in bytes */ bwbuf->hdr[0] = (12 << 16) | (bus_scale_table->num_usecases & 0xFFFF); /* 0-15: element size in bytes; 16-31: data size in bytes */ bwbuf->hdr[1] = (2 << 16) | 4; /* 0-15: bw val offset in bytes; 16-31: vote data offset in bytes */ bwbuf->hdr[2] = (2 << 16) | 0; for (i = 0; i < bus_scale_table->num_usecases; i++) { usecase = &bus_scale_table->usecase[i]; vector = &usecase->vectors[0]; /* Clear bw val */ bwbuf->arr[i] &= 0xFFFF0000; /* Set bw val if not first entry */ if (i) bwbuf->arr[i] |= (DIV_ROUND_UP_ULL(vector->ib, 1048576) & 0xFFFF); } return 0; } Loading
drivers/gpu/msm/kgsl_gmu.h +0 −2 Original line number Diff line number Diff line Loading @@ -132,7 +132,6 @@ struct kgsl_mailbox { * @gmu_interrupt_num: GMU interrupt number * @fw_image: GMU FW image * @hfi_mem: pointer to HFI shared memory * @bw_mem: pointer to BW data indirect buffer memory * @dump_mem: pointer to GMU debug dump memory * @gmu_log: gmu event log memory * @hfi: HFI controller Loading Loading @@ -169,7 +168,6 @@ struct gmu_device { unsigned int gmu_interrupt_num; const struct firmware *fw_image; struct gmu_memdesc *hfi_mem; struct gmu_memdesc *bw_mem; struct gmu_memdesc *dump_mem; struct gmu_memdesc *gmu_log; struct kgsl_hfi hfi; Loading
drivers/gpu/msm/kgsl_hfi.c +3 −28 Original line number Diff line number Diff line Loading @@ -490,36 +490,11 @@ static int hfi_send_dcvstbl(struct gmu_device *gmu) static int hfi_send_bwtbl(struct gmu_device *gmu) { struct hfi_bwtable_cmd cmd = { .hdr = CMD_MSG_HDR(H2F_MSG_BW_VOTE_TBL, sizeof(cmd)), .bw_level_num = gmu->num_bwlevels, .cnoc_cmds_num = gmu->rpmh_votes.cnoc_votes.cmds_per_bw_vote, .cnoc_wait_bitmask = gmu->rpmh_votes.cnoc_votes.cmds_wait_bitmask, .ddr_cmds_num = gmu->rpmh_votes.ddr_votes.cmds_per_bw_vote, .ddr_wait_bitmask = gmu->rpmh_votes.ddr_votes.cmds_wait_bitmask, }; int i, j; for (i = 0; i < cmd.ddr_cmds_num; i++) cmd.ddr_cmd_addrs[i] = gmu->rpmh_votes.ddr_votes.cmd_addrs[i]; for (i = 0; i < cmd.bw_level_num; i++) for (j = 0; j < cmd.ddr_cmds_num; j++) cmd.ddr_cmd_data[i][j] = gmu->rpmh_votes.ddr_votes.cmd_data[i][j]; struct hfi_bwtable_cmd *cmd = &gmu->hfi.bwtbl_cmd; for (i = 0; i < cmd.cnoc_cmds_num; i++) cmd.cnoc_cmd_addrs[i] = gmu->rpmh_votes.cnoc_votes.cmd_addrs[i]; cmd->hdr = CMD_MSG_HDR(H2F_MSG_BW_VOTE_TBL, sizeof(*cmd)); for (i = 0; i < MAX_CNOC_LEVELS; i++) for (j = 0; j < cmd.cnoc_cmds_num; j++) cmd.cnoc_cmd_data[i][j] = gmu->rpmh_votes.cnoc_votes.cmd_data[i][j]; return hfi_send_generic_req(gmu, HFI_CMD_IDX, &cmd); return hfi_send_generic_req(gmu, HFI_CMD_IDX, cmd); } static int hfi_send_test(struct gmu_device *gmu) Loading
drivers/gpu/msm/kgsl_hfi.h +2 −5 Original line number Diff line number Diff line Loading @@ -247,11 +247,6 @@ struct hfi_bwtable_cmd { uint32_t ddr_cmd_data[MAX_GX_LEVELS][MAX_BW_CMDS]; }; struct hfi_bwbuf { uint32_t hdr[3]; uint32_t arr[NUM_BW_LEVELS]; }; struct opp_gx_desc { uint32_t vote; uint32_t acd; Loading Loading @@ -617,6 +612,7 @@ struct pending_cmd { * @version: HFI version number provided * @seqnum: atomic counter that is incremented for each message sent. The * value of the counter is used as sequence number for HFI message * @bwtbl_cmd: HFI BW table buffer */ struct kgsl_hfi { struct kgsl_device *kgsldev; Loading @@ -627,6 +623,7 @@ struct kgsl_hfi { struct tasklet_struct tasklet; uint32_t version; atomic_t seqnum; struct hfi_bwtable_cmd bwtbl_cmd; }; struct gmu_device; Loading