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Commit e1674fd4 authored by Lihua Yao's avatar Lihua Yao Committed by Greg Kroah-Hartman
Browse files

ARM: dts: s3c64xx: Fix init order of clock providers



commit d60d0cff4ab01255b25375425745c3cff69558ad upstream.

fin_pll is the parent of clock-controller@7e00f000, specify
the dependency to ensure proper initialization order of clock
providers.

without this patch:
[    0.000000] S3C6410 clocks: apll = 0, mpll = 0
[    0.000000]  epll = 0, arm_clk = 0

with this patch:
[    0.000000] S3C6410 clocks: apll = 532000000, mpll = 532000000
[    0.000000]  epll = 24000000, arm_clk = 532000000

Cc: <stable@vger.kernel.org>
Fixes: 3f6d439f ("clk: reverse default clk provider initialization order in of_clk_init()")
Signed-off-by: default avatarLihua Yao <ylhuajnu@outlook.com>
Reviewed-by: default avatarSylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: default avatarKrzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent bf368c13
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+4 −0
Original line number Diff line number Diff line
@@ -167,6 +167,10 @@
	};
};

&clocks {
	clocks = <&fin_pll>;
};

&sdhci0 {
	pinctrl-names = "default";
	pinctrl-0 = <&sd0_clk>, <&sd0_cmd>, <&sd0_cd>, <&sd0_bus4>;
+4 −0
Original line number Diff line number Diff line
@@ -71,6 +71,10 @@
	};
};

&clocks {
	clocks = <&fin_pll>;
};

&sdhci0 {
	pinctrl-names = "default";
	pinctrl-0 = <&sd0_clk>, <&sd0_cmd>, <&sd0_cd>, <&sd0_bus4>;