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Commit e0d5d12d authored by Nitin Rawat's avatar Nitin Rawat
Browse files

dt-bindings: ufs: Add UFS VCCQ's parent regulator



Add the UFS's VCCQ parent regulator information so that the
software can perform load voting on this regulator.

Change-Id: I0bdfa1b5d3116dcb5a5d6db33f070dd7671e387d
Signed-off-by: default avatarNitin Rawat <nitirawa@codeaurora.org>
parent 4f9559a8
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+2 −0
Original line number Diff line number Diff line
@@ -43,6 +43,8 @@ Optional properties:
- vddp-ref-clk-max-uV : specifies max voltage that can be set for reference clock supply
- qcom,disable-lpm : disable various LPM mechanisms in UFS for platform compatibility
  (limit link to PWM Gear-1, 1-lane slow mode; disable hibernate, and avoid suspend/resume)
- vccq-parent-supply   : phandle to UFS device's VCCQ parent power supply
- vccq-parent-max-microamp : specifies max. load that can be drawn from the VCCQ's parent supply

Example:

+4 −0
Original line number Diff line number Diff line
@@ -168,6 +168,10 @@ enabled and functional in the driver:
- qcom,vddp-ref-clk-supply	 : reference clock to ufs device. Controlled by the host driver.
- qcom,vddp-ref-clk-max-microamp : specifies max. load that can be drawn for
				   ref-clk supply.
- qcom,vccq-parent-supply         : phandle to VCCQ's parent supply regulator.
- qcom,vccq-parent-max-microamp : specifies max. load that can be drawn for
			           VCCQ's parent supply regulator


Example:
	ufshc@0xfc598000 {