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Commit debd420c authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "ARM: dts: msm: Enable UFS, eMMC and SDcard drivers on ATOLL"

parents 79fcb005 9bef4ee0

arch/arm64/boot/dts/qcom/atoll-idp.dtsi

+63 −0
Original line number Diff line number Diff line
@@ -72,6 +72,69 @@ 
	extcon = <&pm6150_pdphy>;

};



&ufsphy_mem {

	compatible = "qcom,ufs-phy-qmp-v3";



	vdda-phy-supply = <&pm6150_l4>; /* 0.9v */

	vdda-pll-supply = <&pm6150l_l3>; /* 1.2v */

	vdda-phy-max-microamp = <62900>;

	vdda-pll-max-microamp = <18300>;



	status = "ok";

};



&ufshc_mem {

	vdd-hba-supply = <&ufs_phy_gdsc>;

	vdd-hba-fixed-regulator;

	vcc-supply = <&pm6150_l19>;

	vcc-voltage-level = <2950000 2960000>;

	vcc-max-microamp = <600000>;

	vccq2-supply = <&pm6150_l12>;

	vccq2-voltage-level = <1750000 1950000>;

	vccq2-max-microamp = <600000>;



	qcom,vddp-ref-clk-supply = <&pm6150l_l3>; /* PX10 */

	qcom,vddp-ref-clk-max-microamp = <100>;



	status = "ok";

};



&sdhc_1 {

	vdd-supply = <&pm6150_l19>;

	qcom,vdd-voltage-level = <2950000 2950000>;

	qcom,vdd-current-level = <0 570000>;



	vdd-io-supply = <&pm6150_l12>;

	qcom,vdd-io-always-on;

	qcom,vdd-io-lpm-sup;

	qcom,vdd-io-voltage-level = <1800000 1800000>;

	qcom,vdd-io-current-level = <0 325000>;



	pinctrl-names = "active", "sleep";

	pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on &sdc1_rclk_on>;

	pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off &sdc1_rclk_off>;



	status = "ok";

};



&sdhc_2 {

	vdd-supply = <&pm6150l_l9>;

	qcom,vdd-voltage-level = <2950000 2950000>;

	qcom,vdd-current-level = <0 800000>;



	vdd-io-supply = <&pm6150l_l6>;

	qcom,vdd-io-voltage-level = <1800000 2950000>;

	qcom,vdd-io-current-level = <0 22000>;



	pinctrl-names = "active", "sleep";

	pinctrl-0 = <&sdc2_clk_on  &sdc2_cmd_on &sdc2_data_on &sdc2_cd_on>;

	pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &sdc2_cd_off>;



	cd-gpios = <&tlmm 69 GPIO_ACTIVE_LOW>;



	status = "ok";

};



&spmi_bus {

	qcom,pm6150l@4 {

		pm6150l_adc_tm_iio: adc_tm@3400 {

arch/arm64/boot/dts/qcom/atoll-qrd.dtsi

+63 −0
Original line number Diff line number Diff line
@@ -95,3 +95,66 @@ 


	};

};



&ufsphy_mem {

	compatible = "qcom,ufs-phy-qmp-v3";



	vdda-phy-supply = <&pm6150_l4>; /* 0.9v */

	vdda-pll-supply = <&pm6150l_l3>; /* 1.2v */

	vdda-phy-max-microamp = <62900>;

	vdda-pll-max-microamp = <18300>;



	status = "ok";

};



&ufshc_mem {

	vdd-hba-supply = <&ufs_phy_gdsc>;

	vdd-hba-fixed-regulator;

	vcc-supply = <&pm6150_l19>;

	vcc-voltage-level = <2950000 2960000>;

	vcc-max-microamp = <600000>;

	vccq2-supply = <&pm6150_l12>;

	vccq2-voltage-level = <1750000 1950000>;

	vccq2-max-microamp = <600000>;



	qcom,vddp-ref-clk-supply = <&pm6150l_l3>; /* PX10 */

	qcom,vddp-ref-clk-max-microamp = <100>;



	status = "ok";

};



&sdhc_1 {

	vdd-supply = <&pm6150_l19>;

	qcom,vdd-voltage-level = <2950000 2950000>;

	qcom,vdd-current-level = <0 570000>;



	vdd-io-supply = <&pm6150_l12>;

	qcom,vdd-io-always-on;

	qcom,vdd-io-lpm-sup;

	qcom,vdd-io-voltage-level = <1800000 1800000>;

	qcom,vdd-io-current-level = <0 325000>;



	pinctrl-names = "active", "sleep";

	pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on &sdc1_rclk_on>;

	pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off &sdc1_rclk_off>;



	status = "ok";

};



&sdhc_2 {

	vdd-supply = <&pm6150l_l9>;

	qcom,vdd-voltage-level = <2950000 2950000>;

	qcom,vdd-current-level = <0 800000>;



	vdd-io-supply = <&pm6150l_l6>;

	qcom,vdd-io-voltage-level = <1800000 2950000>;

	qcom,vdd-io-current-level = <0 22000>;



	pinctrl-names = "active", "sleep";

	pinctrl-0 = <&sdc2_clk_on  &sdc2_cmd_on &sdc2_data_on &sdc2_cd_on>;

	pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &sdc2_cd_off>;



	cd-gpios = <&tlmm 69 GPIO_ACTIVE_LOW>;



	status = "ok";

};

arch/arm64/boot/dts/qcom/atoll.dtsi

+75 −0
Original line number Diff line number Diff line
@@ -2273,6 +2273,45 @@ 


		qcom,devfreq,freq-table = <50000000 200000000>;



		qcom,msm-bus,name = "sdhc1";

		qcom,msm-bus,num-cases = <9>;

		qcom,msm-bus,num-paths = <2>;

		qcom,msm-bus,vectors-KBps =

			/* No vote */

			<150 512 0 0>, <1 806 0 0>,

			/* 400 KB/s*/

			<150 512 1000 2000>,

			<1 806 2000 4000>,

			/* 20 MB/s */

			<150 512 25000 50000>,

			<1 806 20000 40000>,

			/* 25 MB/s */

			<150 512 50000 100000>,

			<1 806 30000 60000>,

			/* 50 MB/s */

			<150 512 80000 150000>,

			<1 806 40000 80000>,

			/* 100 MB/s */

			<150 512 100000 200000>,

			<1 806 50000 100000>,

			/* 200 MB/s */

			<150 512 150000 250000>,

			<1 806 80000 120000>,

			/* 400 MB/s */

			<150 512 261438 2718822>,

			<1 806 300000 1359411>,

			/* Max. bandwidth */

			<150 512 1338562 4096000>,

			<1 806 1338562 4096000>;

		qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000

			100750000 200000000 400000000 4294967295>;



		/* PM QoS */

		qcom,pm-qos-irq-type = "affine_irq";

		qcom,pm-qos-irq-latency = <67 67>;

		qcom,pm-qos-cpu-groups = <0x3f 0xc0>;

		qcom,pm-qos-cmdq-latency-us = <67 67>, <67 67>;

		qcom,pm-qos-legacy-latency-us = <67 67>, <67 67>;

		clocks = <&clock_gcc GCC_SDCC1_AHB_CLK>,

			<&clock_gcc GCC_SDCC1_APPS_CLK>,

			<&clock_gcc GCC_SDCC1_ICE_CORE_CLK>;
@@ -2308,6 +2347,42 @@ 


		qcom,devfreq,freq-table = <50000000 202000000>;



		qcom,msm-bus,name = "sdhc2";

		qcom,msm-bus,num-cases = <8>;

		qcom,msm-bus,num-paths = <2>;

		qcom,msm-bus,vectors-KBps =

			/* No vote */

			<81 512 0 0>, <1 608 0 0>,

			/* 400 KB/s*/

			<81 512 1000 2000>,

			<1 608 1600 20000>,

			/* 20 MB/s */

			<81 512 20000 40000>,

			<1 608 20000 40000>,

			/* 25 MB/s */

			<81 512 40000 80000>,

			<1 608 30000 60000>,

			/* 50 MB/s */

			<81 512 60000 120000>,

			<1 608 40000 80000>,

			/* 100 MB/s */

			<81 512 80000 160000>,

			<1 608 50000 100000>,

			/* 200 MB/s */

			<81 512 100000 200000>,

			<1 608 60000 120000>,

			/* Max. bandwidth */

			<81 512 1338562 4096000>,

			<1 608 1338562 4096000>;

		qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000

			100750000 200000000 4294967295>;



		/* PM QoS */

		qcom,pm-qos-irq-type = "affine_irq";

		qcom,pm-qos-irq-latency = <67 67>;

		qcom,pm-qos-cpu-groups = <0x3f 0xc0>;

		qcom,pm-qos-legacy-latency-us = <67 67>, <67 67>;



		clocks = <&clock_gcc GCC_SDCC2_AHB_CLK>,

			<&clock_gcc GCC_SDCC2_APPS_CLK>;

		clock-names = "iface_clk", "core_clk";