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Commit ddb362ce authored by Yuval Mintz's avatar Yuval Mintz Committed by David S. Miller
Browse files

mlxsw: reg: add rdpm register 



Add rdpm definition - router DSCP to priority mapping register.
This register will be utilized later to align the default mapping between
packet DSCP and switch-priority to the kernel's mapping between
packet priority and skb priority.

This is the first non-bit indexed register where the entries are arranged
in descending order, i.e., entry at offset 0 matches configuration for
dscp[63]. As a result, the item's step is converted into a signed variable
to support descending arrays [where step would be negative].

Signed-off-by: default avatarYuval Mintz <yuvalm@mellanox.com>
Signed-off-by: default avatarNogah Frankel <nogahf@mellanox.com>
Signed-off-by: default avatarJiri Pirko <jiri@mellanox.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 1988c795

drivers/net/ethernet/mellanox/mlxsw/item.h

+1 −1
Original line number Diff line number Diff line
@@ -42,7 +42,7 @@ 


struct mlxsw_item {

	unsigned short	offset;		/* bytes in container */

	unsigned short	step;		/* step in bytes for indexed items */

	short		step;		/* step in bytes for indexed items */

	unsigned short	in_step_offset; /* offset within one step */

	unsigned char	shift;		/* shift in bits */

	unsigned char	element_size;	/* size of element in bit array */

drivers/net/ethernet/mellanox/mlxsw/reg.h

+37 −0
Original line number Diff line number Diff line
@@ -4827,6 +4827,42 @@ static inline void mlxsw_reg_ratr_counter_pack(char *payload, u64 counter_index, 
	mlxsw_reg_ratr_counter_set_type_set(payload, set_type);

}



/* RDPM - Router DSCP to Priority Mapping

 * --------------------------------------

 * Controls the mapping from DSCP field to switch priority on routed packets

 */

#define MLXSW_REG_RDPM_ID 0x8009

#define MLXSW_REG_RDPM_BASE_LEN 0x00

#define MLXSW_REG_RDPM_DSCP_ENTRY_REC_LEN 0x01

#define MLXSW_REG_RDPM_DSCP_ENTRY_REC_MAX_COUNT 64

#define MLXSW_REG_RDPM_LEN 0x40

#define MLXSW_REG_RDPM_LAST_ENTRY (MLXSW_REG_RDPM_BASE_LEN + \

				   MLXSW_REG_RDPM_LEN - \

				   MLXSW_REG_RDPM_DSCP_ENTRY_REC_LEN)



MLXSW_REG_DEFINE(rdpm, MLXSW_REG_RDPM_ID, MLXSW_REG_RDPM_LEN);



/* reg_dscp_entry_e

 * Enable update of the specific entry

 * Access: Index

 */

MLXSW_ITEM8_INDEXED(reg, rdpm, dscp_entry_e, MLXSW_REG_RDPM_LAST_ENTRY, 7, 1,

		    -MLXSW_REG_RDPM_DSCP_ENTRY_REC_LEN, 0x00, false);



/* reg_dscp_entry_prio

 * Switch Priority

 * Access: RW

 */

MLXSW_ITEM8_INDEXED(reg, rdpm, dscp_entry_prio, MLXSW_REG_RDPM_LAST_ENTRY, 0, 4,

		    -MLXSW_REG_RDPM_DSCP_ENTRY_REC_LEN, 0x00, false);



static inline void mlxsw_reg_rdpm_pack(char *payload, unsigned short index,

				       u8 prio)

{

	mlxsw_reg_rdpm_dscp_entry_e_set(payload, index, 1);

	mlxsw_reg_rdpm_dscp_entry_prio_set(payload, index, prio);

}



/* RICNT - Router Interface Counter Register

 * -----------------------------------------

 * The RICNT register retrieves per port performance counters
@@ -7640,6 +7676,7 @@ static const struct mlxsw_reg_info *mlxsw_reg_infos[] = { 
	MLXSW_REG(rtar),

	MLXSW_REG(ratr),

	MLXSW_REG(rtdp),

	MLXSW_REG(rdpm),

	MLXSW_REG(ricnt),

	MLXSW_REG(rrcr),

	MLXSW_REG(ralta),