Loading Documentation/devicetree/bindings/drm/msm/sde-dp.txt +2 −0 Original line number Diff line number Diff line Loading @@ -108,6 +108,8 @@ Optional properties: device node. Refer to pinctrl-bindings.txt - qcom,max-lclk-frequency-khz: An integer specifying the max. link clock in KHz supported by Display Port. - qcom,mst-fixed-topology-ports: u32 values of which MST output port to reserve, start from one - qcom,dp-aux-bridge: phandle for dp aux bridge module, for 3rd party dp bridge only. - qcom,dp-aux-bridge-sim: phandle for dp aux bridge module, for internal mst debug simulation only. [Optional child nodes]: These nodes are for devices which are dependent on msm_ext_disp. If msm_ext_disp is disabled then Loading arch/arm64/boot/dts/qcom/sa6155-display.dtsi +6 −0 Original line number Diff line number Diff line Loading @@ -53,6 +53,7 @@ vdda-0p9-supply = <&pm6155_1_l5>; /delete-property/ qcom,dp-aux-switch; qcom,mst-enable; qcom,dp-aux-bridge-sim = <&sde_dp_mst_sim>; qcom,core-supply-entries { #address-cells = <1>; Loading Loading @@ -214,6 +215,11 @@ compatible = "qcom,msm-ext-disp-audio-codec-rx"; }; }; sde_dp_mst_sim: qcom,dp-mst-sim { compatible = "qcom,dp-mst-sim"; }; qcom,rmnet-ipa { status="disabled"; }; Loading arch/arm64/boot/dts/qcom/sdmshrike-sde.dtsi +5 −0 Original line number Diff line number Diff line Loading @@ -606,6 +606,10 @@ }; }; sde_dp_mst_sim: qcom,dp-mst-sim { compatible = "qcom,dp-mst-sim"; }; sde_dp: qcom,dp_display@0{ cell-index = <0>; compatible = "qcom,dp-display"; Loading Loading @@ -667,6 +671,7 @@ qcom,max-pclk-frequency-khz = <675000>; qcom,mst-enable; qcom,dp-aux-bridge-sim = <&sde_dp_mst_sim>; qcom,dsc-feature-enable; qcom,fec-feature-enable; qcom,max-dp-dsc-blks = <2>; Loading arch/arm64/boot/dts/qcom/sm8150-sde.dtsi +5 −0 Original line number Diff line number Diff line Loading @@ -577,6 +577,10 @@ }; }; sde_dp_mst_sim: qcom,dp-mst-sim { compatible = "qcom,dp-mst-sim"; }; sde_dp: qcom,dp_display@0{ cell-index = <0>; compatible = "qcom,dp-display"; Loading Loading @@ -641,6 +645,7 @@ qcom,max-pclk-frequency-khz = <675000>; qcom,mst-enable; qcom,dp-aux-bridge-sim = <&sde_dp_mst_sim>; qcom,dsc-feature-enable; qcom,fec-feature-enable; qcom,max-dp-dsc-blks = <2>; Loading drivers/gpu/drm/msm/dp/dp_aux.c +22 −3 Original line number Diff line number Diff line Loading @@ -37,6 +37,7 @@ struct dp_aux_private { struct drm_dp_aux drm_aux; struct msm_dp_aux_bridge *aux_bridge; struct msm_dp_aux_bridge *sim_bridge; bool bridge_in_transfer; bool cmd_busy; Loading Loading @@ -480,6 +481,12 @@ static int dp_aux_transfer_ready(struct dp_aux_private *aux, return ret; } static inline bool dp_aux_is_sideband_msg(u32 address, size_t size) { return (address >= 0x1000 && address + size < 0x1800) || (address >= 0x2000 && address + size < 0x2200); } static ssize_t dp_aux_transfer_debug(struct drm_dp_aux *drm_aux, struct drm_dp_aux_msg *msg) { Loading @@ -501,7 +508,8 @@ static ssize_t dp_aux_transfer_debug(struct drm_dp_aux *drm_aux, goto end; } if ((msg->address + msg->size) > SZ_4K) { if ((msg->address + msg->size) > SZ_4K && !dp_aux_is_sideband_msg(msg->address, msg->size)) { pr_debug("invalid dpcd access: addr=0x%x, size=0x%lx\n", msg->address, msg->size); goto address_error; Loading @@ -514,7 +522,17 @@ static ssize_t dp_aux_transfer_debug(struct drm_dp_aux *drm_aux, reinit_completion(&aux->comp); if (aux->read) { if (dp_aux_is_sideband_msg(msg->address, msg->size)) { if (!aux->sim_bridge || !aux->sim_bridge->transfer) { pr_err("no mst bridge available\n"); atomic_set(&aux->aborted, 1); ret = -ETIMEDOUT; goto end; } ret = aux->sim_bridge->transfer(aux->sim_bridge, drm_aux, msg); } else if (aux->read) { timeout = wait_for_completion_timeout(&aux->comp, HZ); if (!timeout) { pr_err("read timeout 0x%x\n", msg->address); Loading Loading @@ -765,7 +783,7 @@ static void dp_aux_dpcd_updated(struct dp_aux *dp_aux) } static void dp_aux_set_sim_mode(struct dp_aux *dp_aux, bool en, u8 *edid, u8 *dpcd) u8 *edid, u8 *dpcd, struct msm_dp_aux_bridge *sim_bridge) { struct dp_aux_private *aux; Loading @@ -780,6 +798,7 @@ static void dp_aux_set_sim_mode(struct dp_aux *dp_aux, bool en, aux->edid = edid; aux->dpcd = dpcd; aux->sim_bridge = sim_bridge; if (en) { atomic_set(&aux->aborted, 0); Loading Loading
Documentation/devicetree/bindings/drm/msm/sde-dp.txt +2 −0 Original line number Diff line number Diff line Loading @@ -108,6 +108,8 @@ Optional properties: device node. Refer to pinctrl-bindings.txt - qcom,max-lclk-frequency-khz: An integer specifying the max. link clock in KHz supported by Display Port. - qcom,mst-fixed-topology-ports: u32 values of which MST output port to reserve, start from one - qcom,dp-aux-bridge: phandle for dp aux bridge module, for 3rd party dp bridge only. - qcom,dp-aux-bridge-sim: phandle for dp aux bridge module, for internal mst debug simulation only. [Optional child nodes]: These nodes are for devices which are dependent on msm_ext_disp. If msm_ext_disp is disabled then Loading
arch/arm64/boot/dts/qcom/sa6155-display.dtsi +6 −0 Original line number Diff line number Diff line Loading @@ -53,6 +53,7 @@ vdda-0p9-supply = <&pm6155_1_l5>; /delete-property/ qcom,dp-aux-switch; qcom,mst-enable; qcom,dp-aux-bridge-sim = <&sde_dp_mst_sim>; qcom,core-supply-entries { #address-cells = <1>; Loading Loading @@ -214,6 +215,11 @@ compatible = "qcom,msm-ext-disp-audio-codec-rx"; }; }; sde_dp_mst_sim: qcom,dp-mst-sim { compatible = "qcom,dp-mst-sim"; }; qcom,rmnet-ipa { status="disabled"; }; Loading
arch/arm64/boot/dts/qcom/sdmshrike-sde.dtsi +5 −0 Original line number Diff line number Diff line Loading @@ -606,6 +606,10 @@ }; }; sde_dp_mst_sim: qcom,dp-mst-sim { compatible = "qcom,dp-mst-sim"; }; sde_dp: qcom,dp_display@0{ cell-index = <0>; compatible = "qcom,dp-display"; Loading Loading @@ -667,6 +671,7 @@ qcom,max-pclk-frequency-khz = <675000>; qcom,mst-enable; qcom,dp-aux-bridge-sim = <&sde_dp_mst_sim>; qcom,dsc-feature-enable; qcom,fec-feature-enable; qcom,max-dp-dsc-blks = <2>; Loading
arch/arm64/boot/dts/qcom/sm8150-sde.dtsi +5 −0 Original line number Diff line number Diff line Loading @@ -577,6 +577,10 @@ }; }; sde_dp_mst_sim: qcom,dp-mst-sim { compatible = "qcom,dp-mst-sim"; }; sde_dp: qcom,dp_display@0{ cell-index = <0>; compatible = "qcom,dp-display"; Loading Loading @@ -641,6 +645,7 @@ qcom,max-pclk-frequency-khz = <675000>; qcom,mst-enable; qcom,dp-aux-bridge-sim = <&sde_dp_mst_sim>; qcom,dsc-feature-enable; qcom,fec-feature-enable; qcom,max-dp-dsc-blks = <2>; Loading
drivers/gpu/drm/msm/dp/dp_aux.c +22 −3 Original line number Diff line number Diff line Loading @@ -37,6 +37,7 @@ struct dp_aux_private { struct drm_dp_aux drm_aux; struct msm_dp_aux_bridge *aux_bridge; struct msm_dp_aux_bridge *sim_bridge; bool bridge_in_transfer; bool cmd_busy; Loading Loading @@ -480,6 +481,12 @@ static int dp_aux_transfer_ready(struct dp_aux_private *aux, return ret; } static inline bool dp_aux_is_sideband_msg(u32 address, size_t size) { return (address >= 0x1000 && address + size < 0x1800) || (address >= 0x2000 && address + size < 0x2200); } static ssize_t dp_aux_transfer_debug(struct drm_dp_aux *drm_aux, struct drm_dp_aux_msg *msg) { Loading @@ -501,7 +508,8 @@ static ssize_t dp_aux_transfer_debug(struct drm_dp_aux *drm_aux, goto end; } if ((msg->address + msg->size) > SZ_4K) { if ((msg->address + msg->size) > SZ_4K && !dp_aux_is_sideband_msg(msg->address, msg->size)) { pr_debug("invalid dpcd access: addr=0x%x, size=0x%lx\n", msg->address, msg->size); goto address_error; Loading @@ -514,7 +522,17 @@ static ssize_t dp_aux_transfer_debug(struct drm_dp_aux *drm_aux, reinit_completion(&aux->comp); if (aux->read) { if (dp_aux_is_sideband_msg(msg->address, msg->size)) { if (!aux->sim_bridge || !aux->sim_bridge->transfer) { pr_err("no mst bridge available\n"); atomic_set(&aux->aborted, 1); ret = -ETIMEDOUT; goto end; } ret = aux->sim_bridge->transfer(aux->sim_bridge, drm_aux, msg); } else if (aux->read) { timeout = wait_for_completion_timeout(&aux->comp, HZ); if (!timeout) { pr_err("read timeout 0x%x\n", msg->address); Loading Loading @@ -765,7 +783,7 @@ static void dp_aux_dpcd_updated(struct dp_aux *dp_aux) } static void dp_aux_set_sim_mode(struct dp_aux *dp_aux, bool en, u8 *edid, u8 *dpcd) u8 *edid, u8 *dpcd, struct msm_dp_aux_bridge *sim_bridge) { struct dp_aux_private *aux; Loading @@ -780,6 +798,7 @@ static void dp_aux_set_sim_mode(struct dp_aux *dp_aux, bool en, aux->edid = edid; aux->dpcd = dpcd; aux->sim_bridge = sim_bridge; if (en) { atomic_set(&aux->aborted, 0); Loading