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Commit dc4dae00 authored by Mark Rutland's avatar Mark Rutland Committed by Rob Herring
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Docs: dt: add #msi-cells to GICv3 ITS binding



The GICv3 ITS uses sideband master identification data (known as a
DeviceID) to identify which master wrote to a doorbell, and this data is
used to determine how to react in response to the write.

Commit 1e6db000 ("irqchip/gicv3-its: Add platform MSI support")
added support per this binding, but failed to update the documentation.
This patch fixes the documentation.

Signed-off-by: default avatarMark Rutland <mark.rutland@arm.com>
Acked-by: default avatarMarc Zyngier <marc.zyngier@arm.com>
Cc: Rob Herring <robh+dt@kernel.org>
Signed-off-by: default avatarRob Herring <robh@kernel.org>
parent d7ba2a02
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+5 −0
Original line number Diff line number Diff line
@@ -57,6 +57,8 @@ used to route Message Signalled Interrupts (MSI) to the CPUs.
These nodes must have the following properties:
- compatible : Should at least contain  "arm,gic-v3-its".
- msi-controller : Boolean property. Identifies the node as an MSI controller
- #msi-cells: Must be <1>. The single msi-cell is the DeviceID of the device
  which will generate the MSI.
- reg: Specifies the base physical address and size of the ITS
  registers.

@@ -83,6 +85,7 @@ Examples:
		gic-its@2c200000 {
			compatible = "arm,gic-v3-its";
			msi-controller;
			#msi-cells = <1>;
			reg = <0x0 0x2c200000 0 0x200000>;
		};
	};
@@ -107,12 +110,14 @@ Examples:
		gic-its@2c200000 {
			compatible = "arm,gic-v3-its";
			msi-controller;
			#msi-cells = <1>;
			reg = <0x0 0x2c200000 0 0x200000>;
		};

		gic-its@2c400000 {
			compatible = "arm,gic-v3-its";
			msi-controller;
			#msi-cells = <1>;
			reg = <0x0 0x2c400000 0 0x200000>;
		};
	};