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Commit dc054684 authored by Mangesh Kunchamwar's avatar Mangesh Kunchamwar Committed by Gerrit - the friendly Code Review server
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ARM: dts: msm: add support for TDM Mics 



Add entries for Quinary MI2S LPI gpios to support TDM mics.
Included TDM audio overlay dtsi in base DT file for TDM
reworked hardware.

Change-Id: I779d30cdbaa453bbebf9c3711b8f2ba088fd30f5
Signed-off-by: default avatarMangesh Kunchamwar <mangeshk@codeaurora.org>
parent 824f3215

arch/arm64/boot/dts/qcom/qcs405-iot-sku10.dts

+1 −0
Original line number Original line Diff line number Diff line
@@ -14,6 +14,7 @@ 
/dts-v1/;

/dts-v1/;





#include "qcs405.dtsi"

#include "qcs405.dtsi"

#include "qcs405-tdm-audio-overlay.dtsi"





/ {

/ {

	model = "Qualcomm Technologies, Inc. QCS405 EVB1 4000 TDM Mic";

	model = "Qualcomm Technologies, Inc. QCS405 EVB1 4000 TDM Mic";

arch/arm64/boot/dts/qcom/qcs405-lpi.dtsi

+179 −0
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@@ -245,6 +245,185 @@ 
			};

			};

		};

		};





		quin_mi2s_sck {

			quin_mi2s_sck_sleep: quin_mi2s_sck_sleep {

				mux {

					pins = "gpio8";

					function = "func2";

				};



				config {

					pins = "gpio8";

					drive-strength = <2>;   /* 2 mA */

					bias-pull-down;         /* PULL DOWN */

					input-enable;

				};

			};



			quin_mi2s_sck_active: quin_mi2s_sck_active {

				mux {

					pins = "gpio8";

					function = "func2";

				};



				config {

					pins = "gpio8";

					drive-strength = <8>;   /* 8 mA */

					bias-disable;           /* NO PULL */

					output-high;

				};

			};

		};



		quin_mi2s_ws {

			quin_mi2s_ws_sleep: quin_mi2s_ws_sleep {

				mux {

					pins = "gpio9";

					function = "func2";

				};



				config {

					pins = "gpio9";

					drive-strength = <2>;   /* 2 mA */

					bias-pull-down;         /* PULL DOWN */

					input-enable;

				};

			};



			quin_mi2s_ws_active: quin_mi2s_ws_active {

				mux {

					pins = "gpio9";

					function = "func2";

				};



				config {

					pins = "gpio9";

					drive-strength = <8>;   /* 8 mA */

					bias-disable;           /* NO PULL */

					output-high;

				};

			};

		};



		quin_mi2s_sd0 {

			quin_mi2s_sd0_sleep: quin_mi2s_sd0_sleep {

				mux {

					pins = "gpio10";

					function = "func2";

				};



				config {

					pins = "gpio10";

					drive-strength = <2>;   /* 2 mA */

					bias-pull-down;         /* PULL DOWN */

					input-enable;

				};

			};



			quin_mi2s_sd0_active: quin_mi2s_sd0_active {

				mux {

					pins = "gpio10";

					function = "func2";

				};



				config {

					pins = "gpio10";

					drive-strength = <8>;   /* 8 mA */

					bias-disable;           /* NO PULL */

					output-high;

				};

			};

		};



		quin_mi2s_sd1 {

			quin_mi2s_sd1_sleep: quin_mi2s_sd1_sleep {

				mux {

					pins = "gpio11";

					function = "func2";

				};



				config {

					pins = "gpio11";

					drive-strength = <2>;   /* 2 mA */

					bias-pull-down;         /* PULL DOWN */

					input-enable;

				};

			};



			quin_mi2s_sd1_active: quin_mi2s_sd1_active {

				mux {

					pins = "gpio11";

					function = "func2";

				};



				config {

					pins = "gpio11";

					drive-strength = <8>;   /* 8 mA */

					bias-disable;           /* NO PULL */

					output-high;

				};

			};

		};

		quin_mi2s_sd2 {

			quin_mi2s_sd2_sleep: quin_mi2s_sd2_sleep {

				mux {

					pins = "gpio12";

					function = "func2";

				};



				config {

					pins = "gpio12";

					drive-strength = <2>;   /* 2 mA */

					bias-pull-down;         /* PULL DOWN */

					input-enable;

				};

			};



			quin_mi2s_sd2_active: quin_mi2s_sd2_active {

				mux {

					pins = "gpio12";

					function = "func2";

				};



				config {

					pins = "gpio12";

					drive-strength = <8>;   /* 8 mA */

					bias-disable;           /* NO PULL */

					output-high;

				};

			};

		};



		quin_mi2s_sd3 {

			quin_mi2s_sd3_sleep: quin_mi2s_sd3_sleep {

				mux {

					pins = "gpio13";

					function = "func2";

				};



				config {

					pins = "gpio13";

					drive-strength = <2>;   /* 2 mA */

					bias-pull-down;         /* PULL DOWN */

					input-enable;

				};

			};



			quin_mi2s_sd3_active: quin_mi2s_sd3_active {

				mux {

					pins = "gpio13";

					function = "func2";

				};



				config {

					pins = "gpio13";

					drive-strength = <8>;   /* 8 mA */

					bias-disable;           /* NO PULL */

					output-high;

				};

			};

		};



		wsa_swr_clk_pin {

		wsa_swr_clk_pin {

			wsa_swr_clk_sleep: wsa_swr_clk_sleep {

			wsa_swr_clk_sleep: wsa_swr_clk_sleep {

				mux {

				mux {

arch/arm64/boot/dts/qcom/qcs405-tdm-audio-overlay.dtsi

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+73 −0
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/*

 * Copyright (c) 2018, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and

 * only version 2 as published by the Free Software Foundation.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 */



#include "qcs405-tasha.dtsi"

#include "qcs405-va-bolero.dtsi"



&qcs405_snd {

	qcom,model = "qcs405-tdm-snd-card";

	qcom,va-bolero-codec = <1>;

	qcom,tasha-codec = <1>;

	asoc-codec = <&stub_codec>, <&bolero>;

	asoc-codec-names = "msm-stub-codec.1", "bolero_codec";

	qcom,quin-mi2s-gpios = <&cdc_quin_mi2s_gpios>;

	tdm-vdd-micb-supply = <&pms405_l7>;

	qcom,tdm-vdd-micb-voltage = <1800000 1800000>;

	qcom,tdm-vdd-micb-current = <13000>;

	qcom,audio-routing =

		"RX_BIAS", "MCLK",

		"AMIC3", "MIC BIAS3",

		"AMIC4", "MIC BIAS4",

		"MIC BIAS3", "Analog Mic3",

		"MIC BIAS4", "Analog Mic4",

		"VA DMIC0", "VA MIC BIAS1",

		"VA MIC BIAS1", "Digital Mic0",

		"VA DMIC1", "VA MIC BIAS1",

		"VA MIC BIAS1", "Digital Mic1",

		"VA DMIC2", "VA MIC BIAS1",

		"VA MIC BIAS1", "Digital Mic2",

		"VA DMIC3", "VA MIC BIAS1",

		"VA MIC BIAS1", "Digital Mic3",

		"VA DMIC4", "VA MIC BIAS1",

		"VA MIC BIAS1", "Digital Mic4",

		"VA DMIC5", "VA MIC BIAS1",

		"VA MIC BIAS1", "Digital Mic5",

		"VA DMIC6", "VA MIC BIAS1",

		"VA MIC BIAS1", "Digital Mic6",

		"VA DMIC7", "VA MIC BIAS1",

		"VA MIC BIAS1", "Digital Mic7";

	pinctrl-names = "default";

	pinctrl-0 = <&spdifrx_opt_default>;

};



&bolero {

	qcom,num-macros = <1>;

};



&tdm_quin_tx {

	qcom,msm-cpudai-tdm-clk-attribute = /bits/ 16 <1>;

};



&soc {

	cdc_quin_mi2s_gpios: msm_cdc_pinctrl_quin {

		compatible = "qcom,msm-cdc-pinctrl";

		pinctrl-names = "aud_active", "aud_sleep";

		pinctrl-0 = <&quin_mi2s_sck_active &quin_mi2s_ws_active

			     &quin_mi2s_sd0_active &quin_mi2s_sd1_active

			     &quin_mi2s_sd2_active &quin_mi2s_sd3_active>;

		pinctrl-1 = <&quin_mi2s_sck_sleep &quin_mi2s_ws_sleep

			     &quin_mi2s_sd0_sleep &quin_mi2s_sd1_sleep

			     &quin_mi2s_sd2_sleep &quin_mi2s_sd3_sleep>;

		qcom,lpi-gpios;

	};

};