sh: dma-api channel capability extensions.

 */

#include <linux/init.h>

#include <linux/module.h>

#include <linux/interrupt.h>

#include <linux/spinlock.h>

#include <linux/proc_fs.h>

#include <linux/list.h>

#include <linux/platform_device.h>

#include <linux/mm.h>

#include <asm/dma.h>

DEFINE_SPINLOCK(dma_spin_lock);

static LIST_HEAD(registered_dmac_list);

/*

 * A brief note about the reasons for this API as it stands.

 *

 * For starters, the old ISA DMA API didn't work for us for a number of

 * reasons, for one, the vast majority of channels on the SH DMAC are

 * dual-address mode only, and both the new and the old DMA APIs are after the

 * concept of managing a DMA buffer, which doesn't overly fit this model very

 * well. In addition to which, the new API is largely geared at IOMMUs and

 * GARTs, and doesn't even support the channel notion very well.

 *

 * The other thing that's a marginal issue, is the sheer number of random DMA

 * engines that are present (ie, in boards like the Dreamcast), some of which

 * cascade off of the SH DMAC, and others do not. As such, there was a real

 * need for a scalable subsystem that could deal with both single and

 * dual-address mode usage, in addition to interoperating with cascaded DMACs.

 *

 * There really isn't any reason why this needs to be SH specific, though I'm

 * not aware of too many other processors (with the exception of some MIPS)

 * that have the same concept of a dual address mode, or any real desire to

 * actually make use of the DMAC even if such a subsystem were exposed

 * elsewhere.

 *

 * The idea for this was derived from the ARM port, which acted as an excellent

 * reference when trying to address these issues.

 *

 * It should also be noted that the decision to add Yet Another DMA API(tm) to

 * the kernel wasn't made easily, and was only decided upon after conferring

 * with jejb with regards to the state of the old and new APIs as they applied

 * to these circumstances. Philip Blundell was also a great help in figuring

 * out some single-address mode DMA semantics that were otherwise rather

 * confusing.

 */

struct dma_info *get_dma_info(unsigned int chan)

{

	struct dma_info *info;

	unsigned int total = 0;

	/*

	 * Look for each DMAC's range to determine who the owner of

	 * the channel is.

	 */

	list_for_each_entry(info, &registered_dmac_list, list) {

		total += info->nr_channels;

		if (chan > total)

		if ((chan <  info->first_channel_nr) ||

		    (chan >= info->first_channel_nr + info->nr_channels))

			continue;

		return info;

	return NULL;

}

EXPORT_SYMBOL(get_dma_info);

struct dma_info *get_dma_info_by_name(const char *dmac_name)

{

	struct dma_info *info;

	list_for_each_entry(info, &registered_dmac_list, list) {

		if (dmac_name && (strcmp(dmac_name, info->name) != 0))

			continue;

		else

			return info;

	}

	return NULL;

}

EXPORT_SYMBOL(get_dma_info_by_name);

static unsigned int get_nr_channels(void)

{

struct dma_channel *get_dma_channel(unsigned int chan)

{

	struct dma_info *info = get_dma_info(chan);

	struct dma_channel *channel;

	int i;

	if (!info)

	if (unlikely(!info))

		return ERR_PTR(-EINVAL);

	return info->channels + chan;

	for (i = 0; i < info->nr_channels; i++) {

		channel = &info->channels[i];

		if (channel->chan == chan)

			return channel;

	}

	return NULL;

}

EXPORT_SYMBOL(get_dma_channel);

int get_dma_residue(unsigned int chan)

{

	struct dma_info *info = get_dma_info(chan);

	struct dma_channel *channel = &info->channels[chan];

	struct dma_channel *channel = get_dma_channel(chan);

	if (info->ops->get_residue)

		return info->ops->get_residue(channel);

	return 0;

}

EXPORT_SYMBOL(get_dma_residue);

int request_dma(unsigned int chan, const char *dev_id)

static int search_cap(const char **haystack, const char *needle)

{

	struct dma_info *info = get_dma_info(chan);

	struct dma_channel *channel = &info->channels[chan];

	const char **p;

	down(&channel->sem);

	for (p = haystack; *p; p++)

		if (strcmp(*p, needle) == 0)

			return 1;

	return 0;

}

/**

 * request_dma_bycap - Allocate a DMA channel based on its capabilities

 * @dmac: List of DMA controllers to search

 * @caps: List of capabilites

 *

 * Search all channels of all DMA controllers to find a channel which

 * matches the requested capabilities. The result is the channel

 * number if a match is found, or %-ENODEV if no match is found.

 *

 * Note that not all DMA controllers export capabilities, in which

 * case they can never be allocated using this API, and so

 * request_dma() must be used specifying the channel number.

 */

int request_dma_bycap(const char **dmac, const char **caps, const char *dev_id)

{

	unsigned int found = 0;

	struct dma_info *info;

	const char **p;

	int i;

	BUG_ON(!dmac || !caps);

	list_for_each_entry(info, &registered_dmac_list, list)

		if (strcmp(*dmac, info->name) == 0) {

			found = 1;

			break;

		}

	if (!found)

		return -ENODEV;

	for (i = 0; i < info->nr_channels; i++) {

		struct dma_channel *channel = &info->channels[i];

		if (unlikely(!channel->caps))

			continue;

		for (p = caps; *p; p++) {

			if (!search_cap(channel->caps, *p))

				break;

			if (request_dma(channel->chan, dev_id) == 0)

				return channel->chan;

		}

	}

	if (!info->ops || chan >= MAX_DMA_CHANNELS) {

		up(&channel->sem);

	return -EINVAL;

}

EXPORT_SYMBOL(request_dma_bycap);

int dmac_search_free_channel(const char *dev_id)

{

	struct dma_channel *channel = { 0 };

	struct dma_info *info = get_dma_info(0);

	int i;

	for (i = 0; i < info->nr_channels; i++) {

		channel = &info->channels[i];

		if (unlikely(!channel))

			return -ENODEV;

		if (atomic_read(&channel->busy) == 0)

			break;

	}

	if (info->ops->request) {

		int result = info->ops->request(channel);

		if (result)

			return result;

		atomic_set(&channel->busy, 1);

		return channel->chan;

	}

	return -ENOSYS;

}

int request_dma(unsigned int chan, const char *dev_id)

{

	struct dma_channel *channel = { 0 };

	struct dma_info *info = get_dma_info(chan);

	int result;

	channel = get_dma_channel(chan);

	if (atomic_xchg(&channel->busy, 1))

		return -EBUSY;

	strlcpy(channel->dev_id, dev_id, sizeof(channel->dev_id));

	up(&channel->sem);

	if (info->ops->request) {

		result = info->ops->request(channel);

		if (result)

			atomic_set(&channel->busy, 0);

	if (info->ops->request)

		return info->ops->request(channel);

		return result;

	}

	return 0;

}

EXPORT_SYMBOL(request_dma);

void free_dma(unsigned int chan)

{

	struct dma_info *info = get_dma_info(chan);

	struct dma_channel *channel = &info->channels[chan];

	struct dma_channel *channel = get_dma_channel(chan);

	if (info->ops->free)

		info->ops->free(channel);

	atomic_set(&channel->busy, 0);

}

EXPORT_SYMBOL(free_dma);

void dma_wait_for_completion(unsigned int chan)

{

	struct dma_info *info = get_dma_info(chan);

	struct dma_channel *channel = &info->channels[chan];

	struct dma_channel *channel = get_dma_channel(chan);

	if (channel->flags & DMA_TEI_CAPABLE) {

		wait_event(channel->wait_queue,

	while (info->ops->get_residue(channel))

		cpu_relax();

}

EXPORT_SYMBOL(dma_wait_for_completion);

int register_chan_caps(const char *dmac, struct dma_chan_caps *caps)

{

	struct dma_info *info;

	unsigned int found = 0;

	int i;

	list_for_each_entry(info, &registered_dmac_list, list)

		if (strcmp(dmac, info->name) == 0) {

			found = 1;

			break;

		}

	if (unlikely(!found))

		return -ENODEV;

	for (i = 0; i < info->nr_channels; i++, caps++) {

		struct dma_channel *channel;

		if ((info->first_channel_nr + i) != caps->ch_num)

			return -EINVAL;

		channel = &info->channels[i];

		channel->caps = caps->caplist;

	}

	return 0;

}

EXPORT_SYMBOL(register_chan_caps);

void dma_configure_channel(unsigned int chan, unsigned long flags)

{

	struct dma_info *info = get_dma_info(chan);

	struct dma_channel *channel = &info->channels[chan];

	struct dma_channel *channel = get_dma_channel(chan);

	if (info->ops->configure)

		info->ops->configure(channel, flags);

}

EXPORT_SYMBOL(dma_configure_channel);

int dma_xfer(unsigned int chan, unsigned long from,

	     unsigned long to, size_t size, unsigned int mode)

{

	struct dma_info *info = get_dma_info(chan);

	struct dma_channel *channel = &info->channels[chan];

	struct dma_channel *channel = get_dma_channel(chan);

	channel->sar	= from;

	channel->dar	= to;

	return info->ops->xfer(channel);

}

EXPORT_SYMBOL(dma_xfer);

int dma_extend(unsigned int chan, unsigned long op, void *param)

{

	struct dma_info *info = get_dma_info(chan);

	struct dma_channel *channel = get_dma_channel(chan);

	if (info->ops->extend)

		return info->ops->extend(channel, op, param);

	return -ENOSYS;

}

EXPORT_SYMBOL(dma_extend);

#ifdef CONFIG_PROC_FS

static int dma_read_proc(char *buf, char **start, off_t off,

			 int len, int *eof, void *data)

{

	return p - buf;

}

#endif

int register_dmac(struct dma_info *info)

{

	INIT_LIST_HEAD(&info->list);

	printk(KERN_INFO "DMA: Registering %s handler (%d channel%s).\n",

	       info->name, info->nr_channels,

	       info->nr_channels > 1 ? "s" : "");

	       info->name, info->nr_channels, info->nr_channels > 1 ? "s" : "");

	BUG_ON((info->flags & DMAC_CHANNELS_CONFIGURED) && !info->channels);

		size = sizeof(struct dma_channel) * info->nr_channels;

		info->channels = kmalloc(size, GFP_KERNEL);

		info->channels = kzalloc(size, GFP_KERNEL);

		if (!info->channels)

			return -ENOMEM;

		memset(info->channels, 0, size);

	}

	total_channels = get_nr_channels();

	for (i = 0; i < info->nr_channels; i++) {

		struct dma_channel *chan = info->channels + i;

		struct dma_channel *chan = &info->channels[i];

		chan->chan = i;

		chan->vchan = i + total_channels;

		atomic_set(&chan->busy, 0);

		chan->chan  = info->first_channel_nr + i;

		chan->vchan = info->first_channel_nr + i + total_channels;

		memcpy(chan->dev_id, "Unused", 7);

		if (info->flags & DMAC_CHANNELS_TEI_CAPABLE)

			chan->flags |= DMA_TEI_CAPABLE;

		init_MUTEX(&chan->sem);

		init_waitqueue_head(&chan->wait_queue);

		dma_create_sysfs_files(chan, info);

	}

	return 0;

}

EXPORT_SYMBOL(register_dmac);

void unregister_dmac(struct dma_info *info)

{

	list_del(&info->list);

	platform_device_unregister(info->pdev);

}

EXPORT_SYMBOL(unregister_dmac);

static int __init dma_api_init(void)

{

	printk("DMA: Registering DMA API.\n");

#ifdef CONFIG_PROC_FS

	printk(KERN_NOTICE "DMA: Registering DMA API.\n");

	create_proc_read_entry("dma", 0, 0, dma_read_proc, 0);

#endif

	return 0;

}

subsys_initcall(dma_api_init);

MODULE_AUTHOR("Paul Mundt <lethal@linux-sh.org>");

MODULE_DESCRIPTION("DMA API for SuperH");

MODULE_LICENSE("GPL");

EXPORT_SYMBOL(request_dma);

EXPORT_SYMBOL(free_dma);

EXPORT_SYMBOL(register_dmac);

EXPORT_SYMBOL(get_dma_residue);

EXPORT_SYMBOL(get_dma_info);

EXPORT_SYMBOL(get_dma_channel);

EXPORT_SYMBOL(dma_xfer);

EXPORT_SYMBOL(dma_wait_for_completion);

EXPORT_SYMBOL(dma_configure_channel);

#include <linux/spinlock.h>

#include <linux/wait.h>

#include <linux/sysdev.h>

#include <linux/device.h>

#include <asm/cpu/dma.h>

#include <asm/semaphore.h>

/* The maximum address that we can perform a DMA transfer to on this platform */

/* Don't define MAX_DMA_ADDRESS; it's useless on the SuperH and any

 * DMAC (dma_info) flags

 */

enum {

	DMAC_CHANNELS_CONFIGURED	= 0x00,

	DMAC_CHANNELS_TEI_CAPABLE	= 0x01,

	DMAC_CHANNELS_CONFIGURED	= 0x01,

	DMAC_CHANNELS_TEI_CAPABLE	= 0x02,	/* Transfer end interrupt */

};

/*

 * DMA channel capabilities / flags

 */

enum {

	DMA_TEI_CAPABLE			= 0x01,

	DMA_CONFIGURED			= 0x02,

	DMA_CONFIGURED			= 0x01,

	/*

	 * Transfer end interrupt, inherited from DMAC.

	 * wait_queue used in dma_wait_for_completion.

	 */

	DMA_TEI_CAPABLE			= 0x02,

};

extern spinlock_t dma_spin_lock;

	int (*get_residue)(struct dma_channel *chan);

	int (*xfer)(struct dma_channel *chan);

	void (*configure)(struct dma_channel *chan, unsigned long flags);

	int (*configure)(struct dma_channel *chan, unsigned long flags);

	int (*extend)(struct dma_channel *chan, unsigned long op, void *param);

};

struct dma_channel {

	char dev_id[16];

	char dev_id[16];		/* unique name per DMAC of channel */

	unsigned int chan;		/* Physical channel number */

	unsigned int chan;		/* DMAC channel number */

	unsigned int vchan;		/* Virtual channel number */

	unsigned int mode;

	unsigned int count;

	unsigned long sar;

	unsigned long dar;

	const char **caps;

	unsigned long flags;

	atomic_t busy;

	struct semaphore sem;

	wait_queue_head_t wait_queue;

	struct sys_device dev;

	char *name;

	void *priv_data;

};

struct dma_info {

	struct dma_channel *channels;

	struct list_head list;

	int first_channel_nr;

};

struct dma_chan_caps {

	int ch_num;

	const char **caplist;

};

#define to_dma_channel(channel) container_of(channel, struct dma_channel, dev)

#define dma_read_page(chan, from, to)	\

	dma_read(chan, from, to, PAGE_SIZE)

extern int request_dma_bycap(const char **dmac, const char **caps,

			     const char *dev_id);

extern int request_dma(unsigned int chan, const char *dev_id);

extern void free_dma(unsigned int chan);

extern int get_dma_residue(unsigned int chan);

extern int register_dmac(struct dma_info *info);

extern void unregister_dmac(struct dma_info *info);

extern struct dma_info *get_dma_info_by_name(const char *dmac_name);

extern int dma_extend(unsigned int chan, unsigned long op, void *param);

extern int register_chan_caps(const char *dmac, struct dma_chan_caps *capslist);

#ifdef CONFIG_SYSFS

/* arch/sh/drivers/dma/dma-sysfs.c */