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Commit d8c6f1f0 authored by Icenowy Zheng's avatar Icenowy Zheng Committed by Chen-Yu Tsai
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ARM: sun8i: h3/h5: add DE2 CCU device node for H3



The DE2 in H3/H5 has a clock control unit in it, and the behavior is
slightly different between H3 and H5.

Add the common parts in H3/H5 DTSI, and add the compatible string in H3
DTSI.

The compatible string of H5 DE2 CCU will be added in a separated patch.

Signed-off-by: default avatarIcenowy Zheng <icenowy@aosc.io>
Signed-off-by: default avatarChen-Yu Tsai <wens@csie.org>
parent fffa5274
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+4 −0
Original line number Diff line number Diff line
@@ -85,6 +85,10 @@
	compatible = "allwinner,sun8i-h3-ccu";
};

&display_clocks {
	compatible = "allwinner,sun8i-h3-de2-clk";
};

&mmc0 {
	compatible = "allwinner,sun7i-a20-mmc";
	clocks = <&ccu CLK_BUS_MMC0>,
+14 −0
Original line number Diff line number Diff line
@@ -40,9 +40,11 @@
 *     OTHER DEALINGS IN THE SOFTWARE.
 */

#include <dt-bindings/clock/sun8i-de2.h>
#include <dt-bindings/clock/sun8i-h3-ccu.h>
#include <dt-bindings/clock/sun8i-r-ccu.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/reset/sun8i-de2.h>
#include <dt-bindings/reset/sun8i-h3-ccu.h>
#include <dt-bindings/reset/sun8i-r-ccu.h>

@@ -85,6 +87,18 @@
		#size-cells = <1>;
		ranges;

		display_clocks: clock@1000000 {
			/* compatible is in per SoC .dtsi file */
			reg = <0x01000000 0x100000>;
			clocks = <&ccu CLK_DE>,
				 <&ccu CLK_BUS_DE>;
			clock-names = "mod",
				      "bus";
			resets = <&ccu RST_BUS_DE>;
			#clock-cells = <1>;
			#reset-cells = <1>;
		};

		syscon: syscon@1c00000 {
			compatible = "allwinner,sun8i-h3-system-controller",
				"syscon";