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Commit d4ddb503 authored by Shefali Jain's avatar Shefali Jain
Browse files

clk: qcom: Updating hdmi_pclk_clk_src configuration 



hdmi_pclk_clk_src is rcg for hdmi pll which needs to be
configured as per hdmi pll requirement. Updating the
rcg configuration for the same.

Change-Id: Iecab8c309c0d69a1fe035c3e59c84694ceb91aa7
Signed-off-by: default avatarShefali Jain <shefjain@codeaurora.org>
parent bb84735e

drivers/clk/qcom/gcc-qcs405.c

+2 −2
Original line number Diff line number Diff line
@@ -1044,12 +1044,12 @@ static struct clk_rcg2 hdmi_pclk_clk_src = { 
	.mnd_width = 0,

	.hid_width = 5,

	.parent_map = gcc_parent_map_8,

	.freq_tbl = ftbl_esc0_clk_src,

	.clkr.hw.init = &(struct clk_init_data){

		.name = "hdmi_pclk_clk_src",

		.parent_names = gcc_parent_names_8,

		.num_parents = 3,

		.ops = &clk_rcg2_ops,

		.flags = CLK_SET_RATE_PARENT,

		.ops = &clk_byte2_ops,

		.vdd_class = &vdd_cx,

		.num_rate_max = VDD_NUM,

		.rate_max = (unsigned long[VDD_NUM]) {