Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit d48a8bb6 authored by Taniya Das's avatar Taniya Das
Browse files

clk: qcom: rcg2: Add support for hardware control mode 



Add a flag to indicate to support and enable hardware control mode
of an RCG.

Change-Id: I21194a463441ea13b7575a4174b1f96504b42b1e
Signed-off-by: default avatarTaniya Das <tdas@codeaurora.org>
parent 30af045f

drivers/clk/qcom/clk-rcg.h

+1 −0
Original line number Diff line number Diff line
@@ -177,6 +177,7 @@ struct clk_rcg2 { 
	u8			flags;

#define FORCE_ENABLE_RCG	BIT(0)

#define DFS_ENABLE_RCG		BIT(1)

#define HW_CLK_CTRL_MODE	BIT(2)

};



#define to_clk_rcg2(_hw) container_of(to_clk_regmap(_hw), struct clk_rcg2, clkr)

drivers/clk/qcom/clk-rcg2.c

+5 −0
Original line number Diff line number Diff line
@@ -446,6 +446,8 @@ static int clk_rcg2_configure(struct clk_rcg2 *rcg, const struct freq_tbl *f) 
	cfg |= rcg->parent_map[index].cfg << CFG_SRC_SEL_SHIFT;

	if (rcg->mnd_width && f->n && (f->m != f->n))

		cfg |= CFG_MODE_DUAL_EDGE;

	if (rcg->flags & HW_CLK_CTRL_MODE)

		cfg |= CFG_HW_CLK_CTRL_MASK;

	ret = regmap_update_bits(rcg->clkr.regmap,

			rcg->cmd_rcgr + rcg->cfg_off + CFG_REG, mask, cfg);

	if (ret)
@@ -609,6 +611,9 @@ static int clk_rcg2_prepare(struct clk_hw *hw) 
	u32 cfg;

	int ret;



	if (rcg->flags & HW_CLK_CTRL_MODE)

		return 0;



	ret = regmap_read(rcg->clkr.regmap, rcg->cmd_rcgr + CFG_REG, &cfg);

	if (ret)

		return ret;