Commit d3273dea authored Feb 20, 2017 by Andy Lutomirski Committed by Paolo Bonzini Feb 21, 2017

x86/asm/64: Drop __cacheline_aligned from struct x86_hw_tss



Historically, the entire TSS + io bitmap structure was cacheline
aligned, but commit ca241c75 ("x86: unify tss_struct") changed it
(presumably inadvertently) so that the fixed-layout hardware part is
cacheline-aligned and the io bitmap is after the padding.  This wastes
24 bytes (the hardware part should be 104 bytes, but this pads it to
128 bytes) and, serves no purpose, and causes sizeof(struct
x86_hw_tss) to have a confusing value.

Drop the pointless alignment.

Signed-off-by: Andy Lutomirski <luto@kernel.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

parent 8c2e41f7

arch/x86/include/asm/processor.h

+1 −1

Original line number	Original line	Diff line number	Diff line
	@@ -303,7 +303,7 @@ struct x86_hw_tss {
	u16 reserved5;		u16 reserved5;
	u16 io_bitmap_base;		u16 io_bitmap_base;

	} __attribute__((packed)) ____cacheline_aligned;		} __attribute__((packed));
	#endif		#endif

	/*		/*