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Unverified Commit d18e8534 authored by Jernej Skrabec's avatar Jernej Skrabec Committed by Maxime Ripard
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clk: sunxi-ng: r40: Export video PLLs 



Video PLLs need to be referenced in R40 DT as possible HDMI PHY parent.

Export them.

Reviewed-by: default avatarRob Herring <robh@kernel.org>
Reviewed-by: default avatarChen-Yu Tsai <wens@csie.org>
Signed-off-by: default avatarJernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: default avatarMaxime Ripard <maxime.ripard@bootlin.com>
parent fb4aa0f6

drivers/clk/sunxi-ng/ccu-sun8i-r40.h

+6 −2
Original line number Diff line number Diff line
@@ -25,7 +25,9 @@ 
#define CLK_PLL_AUDIO_2X	4

#define CLK_PLL_AUDIO_4X	5

#define CLK_PLL_AUDIO_8X	6

#define CLK_PLL_VIDEO0		7



/* PLL_VIDEO0 is exported */



#define CLK_PLL_VIDEO0_2X	8

#define CLK_PLL_VE		9

#define CLK_PLL_DDR0		10
@@ -34,7 +36,9 @@ 
#define CLK_PLL_PERIPH0_2X	13

#define CLK_PLL_PERIPH1		14

#define CLK_PLL_PERIPH1_2X	15

#define CLK_PLL_VIDEO1		16



/* PLL_VIDEO1 is exported */



#define CLK_PLL_VIDEO1_2X	17

#define CLK_PLL_SATA		18

#define CLK_PLL_SATA_OUT	19

include/dt-bindings/clock/sun8i-r40-ccu.h

+4 −0
Original line number Diff line number Diff line
@@ -43,6 +43,10 @@ 
#ifndef _DT_BINDINGS_CLK_SUN8I_R40_H_

#define _DT_BINDINGS_CLK_SUN8I_R40_H_



#define CLK_PLL_VIDEO0		7



#define CLK_PLL_VIDEO1		16



#define CLK_CPU			24



#define CLK_BUS_MIPI_DSI	29