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Commit cfd7e3a2 authored by Paulo Zanoni's avatar Paulo Zanoni
Browse files

drm/i915/gen9: fix watermarks when using the pipe scaler 



Luckily, the necessary adjustments for when we're using the scaler are
exactly the same as the ones needed on ILK+, so just reuse the
function we already have.

v2: Invert the patch order so stable backports get easier.

Cc: stable@vger.kernel.org
Signed-off-by: default avatarPaulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: default avatarMatt Roper <matthew.d.roper@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1475872138-16194-1-git-send-email-paulo.r.zanoni@intel.com
parent c89cadd5

drivers/gpu/drm/i915/intel_pm.c

+3 −9
Original line number Diff line number Diff line
@@ -3498,12 +3498,6 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate, 
	return 0;

}



static uint32_t skl_pipe_pixel_rate(const struct intel_crtc_state *config)

{

	/* TODO: Take into account the scalers once we support them */

	return config->base.adjusted_mode.crtc_clock;

}



/*

 * The max latency should be 257 (max the punit can code is 255 and we add 2us

 * for the read latency) and cpp should always be <= 8, so that
@@ -3554,7 +3548,7 @@ static uint32_t skl_adjusted_plane_pixel_rate(const struct intel_crtc_state *cst 
	 * Adjusted plane pixel rate is just the pipe's adjusted pixel rate

	 * with additional adjustments for plane-specific scaling.

	 */

	adjusted_pixel_rate = skl_pipe_pixel_rate(cstate);

	adjusted_pixel_rate = ilk_pipe_pixel_rate(cstate);

	downscale_amount = skl_plane_downscale_amount(pstate);



	pixel_rate = adjusted_pixel_rate * downscale_amount >> 16;
@@ -3763,11 +3757,11 @@ skl_compute_linetime_wm(struct intel_crtc_state *cstate) 
	if (!cstate->base.active)

		return 0;



	if (WARN_ON(skl_pipe_pixel_rate(cstate) == 0))

	if (WARN_ON(ilk_pipe_pixel_rate(cstate) == 0))

		return 0;



	return DIV_ROUND_UP(8 * cstate->base.adjusted_mode.crtc_htotal * 1000,

			    skl_pipe_pixel_rate(cstate));

			    ilk_pipe_pixel_rate(cstate));

}



static void skl_compute_transition_wm(struct intel_crtc_state *cstate,