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Commit cf4ec979 authored by Harry Yang's avatar Harry Yang
Browse files

power: smb5: Explicitly enable USBIN AICL for redundancy 



USBIN_AICL_EN is set by default in PMIC. Not altered anywhere in charger
driver, this bit is still seen cleared occasionally in HLOS, which causes
reverse boost.

Explicitly enable it during probe.

CRs-Fixed: 2266383
Change-Id: I2ddb099cd40fac837113bfe29f89681eedf69385
Signed-off-by: default avatarHarry Yang <harryy@codeaurora.org>
parent 47cb4b24

drivers/power/supply/qcom/qpnp-smb5.c

+3 −2
Original line number Diff line number Diff line
@@ -1849,8 +1849,9 @@ static int smb5_init_hw(struct smb5 *chip) 
	if (chg->smb_version != PMI632_SUBTYPE) {

		rc = smblib_masked_write(chg, USBIN_AICL_OPTIONS_CFG_REG,

				USBIN_AICL_PERIODIC_RERUN_EN_BIT

				| USBIN_AICL_ADC_EN_BIT,

				USBIN_AICL_PERIODIC_RERUN_EN_BIT);

				| USBIN_AICL_ADC_EN_BIT | USBIN_AICL_EN_BIT,

				USBIN_AICL_PERIODIC_RERUN_EN_BIT

				| USBIN_AICL_EN_BIT);

		if (rc < 0) {

			dev_err(chg->dev, "Couldn't config AICL rc=%d\n", rc);

			return rc;

drivers/power/supply/qcom/smb5-reg.h

+1 −0
Original line number Diff line number Diff line
@@ -272,6 +272,7 @@ enum { 
#define SUSPEND_ON_COLLAPSE_USBIN_BIT		BIT(7)

#define USBIN_AICL_PERIODIC_RERUN_EN_BIT	BIT(4)

#define USBIN_AICL_ADC_EN_BIT			BIT(3)

#define USBIN_AICL_EN_BIT			BIT(2)



#define USB_ENG_SSUPPLY_USB2_REG		(USBIN_BASE + 0xC0)

#define ENG_SSUPPLY_12V_OV_OPT_BIT		BIT(1)