Merge "ARM: dts: msm: Add a vote for CPU to GPU Config path for SM8150" (ce885925) · Commits · e / devices / android_kernel_xiaomi_nabu

Documentation/devicetree/bindings/gpu/adreno.txt

+7 −0

Original line number	Diff line number	Diff line
		@@ -72,6 +72,13 @@ Bus Scaling Data:
		qcom,msm-bus,vectors-KBps
		to be used by ocmem msm bus scaling client.

		- qcom,cpu-to-ahb-path: Container for another set of bus scaling properties
		qcom,msm-bus,name
		qcom,msm-bus,num-cases
		qcom,msm-bus,num-paths
		qcom,msm-bus,vectors-KBps
		to be used for keeping all clocks ON in CPU to GPU AHB config path.

		GDSC Oxili Regulators:
		- regulator-names: List of regulator name strings sorted in power-on order
		- vddcx-supply: Phandle for vddcx regulator device node.

arch/arm64/boot/dts/qcom/sm8150-gpu.dtsi

+11 −0

Original line number	Diff line number	Diff line
		@@ -302,6 +302,17 @@
		qcom,bus-max = <0>;
		};
		};

		qcom,cpu-to-ahb-path {
		qcom,msm-bus,name = "ahbpath";
		qcom,msm-bus,num-cases = <3>;
		qcom,msm-bus,num-paths = <1>;
		qcom,msm-bus,vectors-KBps =
		<1 598 0 0>, // off
		<1 598 0 100>, // min freq
		<1 598 0 9999999>; // max freq
		};

		};

		kgsl_msm_iommu: qcom,kgsl-iommu@0x02CA0000 {

drivers/gpu/msm/adreno.c

+24 −0

Original line number	Diff line number	Diff line
		@@ -1926,6 +1926,14 @@ static int _adreno_start(struct adreno_device *adreno_dev)
		/* Clear any GPU faults that might have been left over */
		adreno_clear_gpu_fault(adreno_dev);

		/*
		* Keep high bus vote to reduce AHB latency
		* during FW loading and wakeup.
		*/
		if (device->pwrctrl.ahbpath_pcl)
		msm_bus_scale_client_update_request(device->pwrctrl.ahbpath_pcl,
		KGSL_AHB_PATH_HIGH);

		/* Put the GPU in a responsive state */
		status = kgsl_pwrctrl_change_state(device, KGSL_STATE_AWARE);
		if (status)
		@@ -2187,6 +2195,15 @@ static int _adreno_start(struct adreno_device *adreno_dev)
		gmu_dev_ops->oob_clear(adreno_dev, oob_boot_slumber);
		}

		/*
		* Low vote is enough after wakeup completes, this will make
		* sure CPU to GPU AHB infrastructure clocks are running at-least
		* at minimum frequency.
		*/
		if (device->pwrctrl.ahbpath_pcl)
		msm_bus_scale_client_update_request(device->pwrctrl.ahbpath_pcl,
		KGSL_AHB_PATH_LOW);

		return 0;

		error_oob_clear:
		@@ -2209,6 +2226,9 @@ static int _adreno_start(struct adreno_device *adreno_dev)
		pm_qos_update_request(&device->pwrctrl.pm_qos_req_dma,
		pmqos_active_vote);

		if (device->pwrctrl.ahbpath_pcl)
		msm_bus_scale_client_update_request(device->pwrctrl.ahbpath_pcl,
		KGSL_AHB_PATH_OFF);
		return status;
		}

		@@ -2328,6 +2348,10 @@ static int adreno_stop(struct kgsl_device *device)
		*/
		adreno_set_active_ctxs_null(adreno_dev);

		if (device->pwrctrl.ahbpath_pcl)
		msm_bus_scale_client_update_request(device->pwrctrl.ahbpath_pcl,
		KGSL_AHB_PATH_OFF);

		clear_bit(ADRENO_DEVICE_STARTED, &adreno_dev->priv);

		return error;

drivers/gpu/msm/adreno_snapshot.c

+15 −1

Original line number	Diff line number	Diff line
		@@ -10,6 +10,8 @@
		* GNU General Public License for more details.
		*/

		#include <linux/msm-bus.h>

		#include "kgsl.h"
		#include "kgsl_sharedmem.h"
		#include "kgsl_snapshot.h"
		@@ -864,6 +866,14 @@ void adreno_snapshot(struct kgsl_device device, struct kgsl_snapshot snapshot,

		snapshot_frozen_objsize = 0;

		/*
		* We read lots of registers during GPU snapshot. Keep
		* high bus vote to reduce AHB latency.
		*/
		if (device->pwrctrl.ahbpath_pcl)
		msm_bus_scale_client_update_request(device->pwrctrl.ahbpath_pcl,
		KGSL_AHB_PATH_HIGH);

		/* Add GPU specific sections - registers mainly, but other stuff too */
		if (gpudev->snapshot)
		gpudev->snapshot(adreno_dev, snapshot);
		@@ -871,7 +881,7 @@ void adreno_snapshot(struct kgsl_device device, struct kgsl_snapshot snapshot,
		/* Dumping these buffers is useless if the GX is not on */
		if (GMU_DEV_OP_VALID(gmu_dev_ops, gx_is_on) &&
		!gmu_dev_ops->gx_is_on(adreno_dev))
		return;
		goto out;

		setup_fault_process(device, snapshot,
		context ? context->proc_priv : NULL);
		@@ -970,6 +980,10 @@ void adreno_snapshot(struct kgsl_device device, struct kgsl_snapshot snapshot,
		KGSL_CORE_ERR("GPU snapshot froze %zdKb of GPU buffers\n",
		snapshot_frozen_objsize / 1024);

		out:
		if (device->pwrctrl.ahbpath_pcl)
		msm_bus_scale_client_update_request(device->pwrctrl.ahbpath_pcl,
		KGSL_AHB_PATH_LOW);
		}

		/*

drivers/gpu/msm/kgsl_pwrctrl.c

+31 −1

Original line number	Diff line number	Diff line
		@@ -2195,6 +2195,14 @@ static inline void _close_ocmem_pcl(struct kgsl_pwrctrl *pwr)
		pwr->ocmem_pcl = 0;
		}

		static void _close_ahbpath_pcl(struct kgsl_pwrctrl *pwr)
		{
		if (pwr->ahbpath_pcl)
		msm_bus_scale_unregister_client(pwr->ahbpath_pcl);

		pwr->ahbpath_pcl = 0;
		}

		static inline void _close_regulators(struct kgsl_pwrctrl *pwr)
		{
		int i;
		@@ -2269,8 +2277,10 @@ int kgsl_pwrctrl_init(struct kgsl_device *device)
		struct platform_device *pdev = device->pdev;
		struct kgsl_pwrctrl *pwr = &device->pwrctrl;
		struct device_node *ocmem_bus_node;
		struct device_node *ahbpath_node;
		struct msm_bus_scale_pdata *ocmem_scale_table = NULL;
		struct msm_bus_scale_pdata *bus_scale_table;
		struct msm_bus_scale_pdata *ahbpath_table;
		struct device_node *gpubw_dev_node = NULL;
		struct platform_device *p2dev;

		@@ -2364,6 +2374,22 @@ int kgsl_pwrctrl_init(struct kgsl_device *device)
		}
		}

		ahbpath_node =
		of_find_node_by_name(device->pdev->dev.of_node,
		"qcom,cpu-to-ahb-path");
		if (ahbpath_node) {
		ahbpath_table =
		msm_bus_pdata_from_node(device->pdev, ahbpath_node);
		if (ahbpath_table)
		pwr->ahbpath_pcl =
		msm_bus_scale_register_client(ahbpath_table);

		if (!pwr->ahbpath_pcl) {
		result = -EINVAL;
		goto error_cleanup_ocmem_pcl;
		}
		}

		/* Bus width in bytes, set it to zero if not found */
		if (of_property_read_u32(pdev->dev.of_node, "qcom,bus-width",
		&pwr->bus_width))
		@@ -2393,7 +2419,7 @@ int kgsl_pwrctrl_init(struct kgsl_device *device)
		pwr->pcl = msm_bus_scale_register_client(bus_scale_table);
		if (pwr->pcl == 0) {
		result = -EINVAL;
		goto error_cleanup_ocmem_pcl;
		goto error_cleanup_ahbpath_pcl;
		}
		}

		@@ -2497,6 +2523,8 @@ int kgsl_pwrctrl_init(struct kgsl_device *device)
		kfree(pwr->bus_ib);
		error_cleanup_pcl:
		_close_pcl(pwr);
		error_cleanup_ahbpath_pcl:
		_close_ahbpath_pcl(pwr);
		error_cleanup_ocmem_pcl:
		_close_ocmem_pcl(pwr);
		error_disable_pm:
		@@ -2529,6 +2557,8 @@ void kgsl_pwrctrl_close(struct kgsl_device *device)

		_close_ocmem_pcl(pwr);

		_close_ahbpath_pcl(pwr);

		pm_runtime_disable(&device->pdev->dev);

		_close_regulators(pwr);