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Commit ce7befb4 authored by qctecmdr Service's avatar qctecmdr Service Committed by Gerrit - the friendly Code Review server
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Merge "ARM: dts: msm: disable LMH platform cpu mitigation for TRINKET"

parents a8a4e6ef db9db735

Documentation/devicetree/bindings/thermal/qcom-lmh-dcvs.txt

+7 −0
Original line number Diff line number Diff line
@@ -57,6 +57,12 @@ Properties: 
			register space in index 0 should be LLM and index 1

			should be OSM.



- qcom,plat-mitigation-disable:

	Usage: optional

	Value type: <none>

	Definition: Should define this property if platform based cpu cooling

			device is not required.



Example:



	lmh_dcvs0: qcom,limits-dcvs@18350800 {
@@ -69,6 +75,7 @@ Example: 
		isens-vref-0p8-settings = <880000 880000 36000>;

		reg =  <0x18350800 0x1000>, //LLM

			<0x18323000 0x1000>; //OSM

		qcom,plat-mitigation-disable;

	};



	CPU0: cpu@0 {

arch/arm64/boot/dts/qcom/trinket-thermal.dtsi

+1 −0
Original line number Diff line number Diff line
@@ -22,6 +22,7 @@ 
		qcom,affinity = <0>;

		reg = <0xf550800 0x1000>,

			<0xf521000 0x1000>;

		qcom,plat-mitigation-disable;

		#thermal-sensor-cells = <0>;

	};

};

drivers/thermal/qcom/msm_lmh_dcvs.c

+32 −3
Original line number Diff line number Diff line 
/* Copyright (c) 2016-2018, The Linux Foundation. All rights reserved.

/* Copyright (c) 2016-2019, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and
@@ -25,6 +25,7 @@ 
#include <linux/interrupt.h>

#include <linux/timer.h>

#include <linux/pm_opp.h>

#include <linux/cpufreq.h>

#include <linux/cpu_cooling.h>

#include <linux/atomic.h>

#include <linux/regulator/consumer.h>
@@ -96,6 +97,7 @@ struct limits_dcvs_hw { 
	struct device_attribute lmh_freq_attr;

	struct list_head list;

	bool is_irq_enabled;

	bool is_plat_mit_disabled;

	struct mutex access_lock;

	struct __limits_cdev_data *cdev_data;

	uint32_t cdev_registered;
@@ -408,6 +410,8 @@ static void register_cooling_device(struct work_struct *work) 
{

	struct limits_dcvs_hw *hw;

	unsigned int cpu = 0, idx = 0;

	struct device_node *cpu_node;

	struct cpufreq_policy *policy;



	mutex_lock(&lmh_dcvs_list_access);

	list_for_each_entry(hw, &lmh_dcvs_hw_list, list) {
@@ -424,12 +428,33 @@ static void register_cooling_device(struct work_struct *work) 
				idx++;

				continue;

			}

			cpumask_set_cpu(cpu, &cpu_mask);

			hw->cdev_data[idx].max_freq = U32_MAX;

			hw->cdev_data[idx].min_freq = 0;



			if (!hw->is_plat_mit_disabled) {

				cpumask_set_cpu(cpu, &cpu_mask);

				hw->cdev_data[idx].cdev =

					cpufreq_platform_cooling_register(

							&cpu_mask, &cd_ops);

			} else {

				cpu_node = of_cpu_device_node_get(cpu);

				if (WARN_ON(!cpu_node)) {

					hw->cdev_data[idx].cdev = NULL;

					continue;

				}



				policy = cpufreq_cpu_get(cpu);

				if (!policy) {

					pr_err("No policy for cpu%d\n", cpu);

					hw->cdev_data[idx].cdev = NULL;

					of_node_put(cpu_node);

					continue;

				}

				hw->cdev_data[idx].cdev =

					of_cpufreq_cooling_register(cpu_node,

						policy);

				of_node_put(cpu_node);

			}

			if (IS_ERR_OR_NULL(hw->cdev_data[idx].cdev)) {

				pr_err("CPU:%u cdev register error:%ld\n",

					cpu, PTR_ERR(hw->cdev_data[idx].cdev));
@@ -588,6 +613,10 @@ static int limits_dcvs_probe(struct platform_device *pdev) 
		return -EINVAL;

	};



	/* Check whether platform mitigation needs to enable or not */

	hw->is_plat_mit_disabled = of_property_read_bool(dn,

				"qcom,plat-mitigation-disable");



	addr = of_get_address(dn, 0, NULL, NULL);

	if (!addr) {

		pr_err("Property llm-base-addr not found\n");