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Commit cd9d187b authored by Fuyun Liang's avatar Fuyun Liang Committed by David S. Miller
Browse files

net: hns3: change GL update rate 



The interrupt coalescing self-adaptive function updates the int_gl every
interrupt. The GL update rate is too faster to get a better new GL value.
This patch changes the GL update rate to every one hundred interrupts.
The GL update rate is defined by HNS3_INT_ADAPT_DOWN_START.

Signed-off-by: default avatarFuyun Liang <liangfuyun1@huawei.com>
Signed-off-by: default avatarPeng Li <lipeng321@huawei.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent d458c815

drivers/net/ethernet/hisilicon/hns3/hns3_enet.c

+8 −0
Original line number Diff line number Diff line
@@ -214,6 +214,7 @@ static void hns3_vector_gl_rl_init(struct hns3_enet_tqp_vector *tqp_vector, 
	/* Default: disable RL */

	h->kinfo.int_rl_setting = 0;



	tqp_vector->int_adapt_down = HNS3_INT_ADAPT_DOWN_START;

	tqp_vector->rx_group.coal.flow_level = HNS3_FLOW_LOW;

	tqp_vector->tx_group.coal.flow_level = HNS3_FLOW_LOW;

}
@@ -2492,6 +2493,11 @@ static void hns3_update_new_int_gl(struct hns3_enet_tqp_vector *tqp_vector) 
	struct hns3_enet_ring_group *tx_group = &tqp_vector->tx_group;

	bool rx_update, tx_update;



	if (tqp_vector->int_adapt_down > 0) {

		tqp_vector->int_adapt_down--;

		return;

	}



	if (rx_group->coal.gl_adapt_enable) {

		rx_update = hns3_get_new_int_gl(rx_group);

		if (rx_update)
@@ -2505,6 +2511,8 @@ static void hns3_update_new_int_gl(struct hns3_enet_tqp_vector *tqp_vector) 
			hns3_set_vector_coalesce_tx_gl(tqp_vector,

						       tx_group->coal.int_gl);

	}



	tqp_vector->int_adapt_down = HNS3_INT_ADAPT_DOWN_START;

}



static int hns3_nic_common_poll(struct napi_struct *napi, int budget)

drivers/net/ethernet/hisilicon/hns3/hns3_enet.h

+2 −0
Original line number Diff line number Diff line
@@ -462,6 +462,8 @@ enum hns3_link_mode_bits { 
#define HNS3_INT_RL_MAX			0x00EC

#define HNS3_INT_RL_ENABLE_MASK		0x40



#define HNS3_INT_ADAPT_DOWN_START	100



struct hns3_enet_coalesce {

	u16 int_gl;

	u8 gl_adapt_enable;