Merge "msm: kgsl: Optimally reserve CP context record size for A6xx GPUs" (cc4fa216) · Commits · e / devices / android_kernel_xiaomi_nabu

drivers/gpu/msm/adreno_a6xx.h

+0 −2

Original line number	Diff line number	Diff line
		@@ -94,8 +94,6 @@ struct cpu_gpu_lock {
		};

		#define A6XX_CP_CTXRECORD_MAGIC_REF 0xAE399D6EUL
		/* Size of each CP preemption record */
		#define A6XX_CP_CTXRECORD_SIZE_IN_BYTES (2112 * 1024)
		/* Size of the preemption counter block (in bytes) */
		#define A6XX_CP_CTXRECORD_PREEMPTION_COUNTER_SIZE (16 * 4)
		/* Size of the user context record block (in bytes) */

+11 −2

Original line number	Diff line number	Diff line
		@@ -619,14 +619,23 @@ static int a6xx_preemption_ringbuffer_init(struct adreno_device *adreno_dev,
		struct kgsl_device *device = KGSL_DEVICE(adreno_dev);
		int ret;

		/*
		* Reserve CP context record size as
		* GMEM size + GPU HW state size i.e 0x110000
		*/
		ret = kgsl_allocate_global(device, &rb->preemption_desc,
		A6XX_CP_CTXRECORD_SIZE_IN_BYTES, 0, KGSL_MEMDESC_PRIVILEGED,
		adreno_dev->gpucore->gmem_size + 0x110000,
		0, KGSL_MEMDESC_PRIVILEGED,
		"preemption_desc");
		if (ret)
		return ret;

		/*
		* Reserve CP context record size as
		* GMEM size + GPU HW state size i.e 0x110000
		*/
		ret = kgsl_allocate_user(device, &rb->secure_preemption_desc,
		A6XX_CP_CTXRECORD_SIZE_IN_BYTES,
		adreno_dev->gpucore->gmem_size + 0x110000,
		KGSL_MEMFLAGS_SECURE \| KGSL_MEMDESC_PRIVILEGED);
		if (ret)
		return ret;