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Commit cbb9d131 authored by Jishnu Prakash's avatar Jishnu Prakash
Browse files

drivers: iio: adc: Update wait times for end of conversion check 



Presently, there is a wait time of upto 1s for EOC interrupt
and a polling time of nearly 300ms after it, if interrupt is not
triggered. This delay is larger than required by HW and can lead
to issues of unexpected excessive delay in SW.
Reduce the wait time for EOC interrupt to 100ms and timeout time
when polling after it to 50ms, according to HW side recommendation.

Change-Id: Ia1629311ce16810d7eb2a87a15c094d14e0457a1
Signed-off-by: default avatarJishnu Prakash <jprakash@codeaurora.org>
parent b11404df

drivers/iio/adc/qcom-spmi-adc5.c

+9 −5
Original line number Diff line number Diff line
@@ -80,7 +80,8 @@ 
 */

#define ADC_CONV_TIME_MIN_US			263

#define ADC_CONV_TIME_MAX_US			264

#define ADC_CONV_TIME_RETRY			400

#define ADC_CONV_TIME_RETRY_POLL		570

#define ADC_CONV_TIME_RETRY				190

#define ADC_CONV_TIMEOUT			msecs_to_jiffies(100)



/* CAL peripheral */
@@ -268,12 +269,15 @@ static int adc_read_voltage_data(struct adc_chip *adc, u16 *data) 
	return ret;

}



static int adc_poll_wait_eoc(struct adc_chip *adc)

static int adc_poll_wait_eoc(struct adc_chip *adc, bool poll_only)

{

	unsigned int count, retry;

	u8 status1;

	int ret;



	if (poll_only)

		retry = ADC_CONV_TIME_RETRY_POLL;

	else

		retry = ADC_CONV_TIME_RETRY;



	for (count = 0; count < retry; count++) {
@@ -295,7 +299,7 @@ static int adc_wait_eoc(struct adc_chip *adc) 
	int ret;



	if (adc->poll_eoc) {

		ret = adc_poll_wait_eoc(adc);

		ret = adc_poll_wait_eoc(adc, true);

		if (ret < 0) {

			pr_err("EOC bit not set\n");

			return ret;
@@ -305,7 +309,7 @@ static int adc_wait_eoc(struct adc_chip *adc) 
							ADC_CONV_TIMEOUT);

		if (!ret) {

			pr_debug("Did not get completion timeout.\n");

			ret = adc_poll_wait_eoc(adc);

			ret = adc_poll_wait_eoc(adc, false);

			if (ret < 0) {

				pr_err("EOC bit not set\n");

				return ret;