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Commit ca9f6956 authored by Harry Yang's avatar Harry Yang
Browse files

power: smb5: Add die temp to regulate ICL on RST threshold 



Currently, die temp does not directly regulate ICL. In case of die temp
fault, it could rush quickly across T_RST threshold to reach T_SHUTDOWN,
and HW shutsdown PMIC, while SW could handle it more gracefully and
effectively by early intervention.

Fix it by reducing ICL to 500mA once die temp hits T_RST threshold.

Change-Id: Icdcd2d88f87af9e44e28a3f362adde90c785ee87
Signed-off-by: default avatarHarry Yang <harryy@codeaurora.org>
parent 174fd57a

drivers/power/supply/qcom/qpnp-smb5.c

+15 −9
Original line number Diff line number Diff line
@@ -1774,15 +1774,6 @@ static int smb5_init_hw(struct smb5 *chip) 
		}

	}



	/* Disable SMB Temperature ADC INT */

	rc = smblib_masked_write(chg, MISC_THERMREG_SRC_CFG_REG,

					 THERMREG_SMB_ADC_SRC_EN_BIT, 0);

	if (rc < 0) {

		dev_err(chg->dev, "Couldn't configure SMB thermal regulation  rc=%d\n",

				rc);

		return rc;

	}



	/*

	 * If SW thermal regulation WA is active then all the HW temperature

	 * comparators need to be disabled to prevent HW thermal regulation,
@@ -1796,6 +1787,15 @@ static int smb5_init_hw(struct smb5 *chip) 
				rc);

			return rc;

		}

	} else {

		/* Allows software thermal regulation only */

		rc = smblib_write(chg, MISC_THERMREG_SRC_CFG_REG,

					 THERMREG_SW_ICL_ADJUST_BIT);

		if (rc < 0) {

			dev_err(chg->dev, "Couldn't configure SMB thermal regulation rc=%d\n",

					rc);

			return rc;

		}

	}



	/*
@@ -2414,8 +2414,14 @@ static struct smb_irq_info smb5_irqs[] = { 
	[IMP_TRIGGER_IRQ] = {

		.name		= "imp-trigger",

	},

	/*

	 * triggered when DIE or SKIN or CONNECTOR temperature across

	 * either of the _REG_L, _REG_H, _RST, or _SHDN thresholds

	 */

	[TEMP_CHANGE_IRQ] = {

		.name		= "temp-change",

		.handler	= temp_change_irq_handler,

		.wake		= true,

	},

	[TEMP_CHANGE_SMB_IRQ] = {

		.name		= "temp-change-smb",

drivers/power/supply/qcom/smb5-lib.c

+31 −0
Original line number Diff line number Diff line
@@ -4981,6 +4981,37 @@ irqreturn_t wdog_bark_irq_handler(int irq, void *data) 
	return IRQ_HANDLED;

}



static void smblib_die_rst_icl_regulate(struct smb_charger *chg)

{

	int rc;

	u8 temp;



	rc = smblib_read(chg, DIE_TEMP_STATUS_REG, &temp);

	if (rc < 0) {

		smblib_err(chg, "Couldn't read DIE_TEMP_STATUS_REG rc=%d\n",

				rc);

		return;

	}



	/* Regulate ICL on die temp crossing DIE_RST threshold */

	vote(chg->usb_icl_votable, DIE_TEMP_VOTER,

				temp & DIE_TEMP_RST_BIT, 500000);

}



/*

 * triggered when DIE or SKIN or CONNECTOR temperature across

 * either of the _REG_L, _REG_H, _RST, or _SHDN thresholds

 */

irqreturn_t temp_change_irq_handler(int irq, void *data)

{

	struct smb_irq_data *irq_data = data;

	struct smb_charger *chg = irq_data->parent_data;



	smblib_die_rst_icl_regulate(chg);



	return IRQ_HANDLED;

}



/**************

 * Additional USB PSY getters/setters

 * that call interrupt functions

drivers/power/supply/qcom/smb5-lib.h

+2 −0
Original line number Diff line number Diff line
@@ -42,6 +42,7 @@ enum print_reason { 
#define CHG_STATE_VOTER			"CHG_STATE_VOTER"

#define TAPER_END_VOTER			"TAPER_END_VOTER"

#define THERMAL_DAEMON_VOTER		"THERMAL_DAEMON_VOTER"

#define DIE_TEMP_VOTER			"DIE_TEMP_VOTER"

#define BOOST_BACK_VOTER		"BOOST_BACK_VOTER"

#define MICRO_USB_VOTER			"MICRO_USB_VOTER"

#define DEBUG_BOARD_VOTER		"DEBUG_BOARD_VOTER"
@@ -513,6 +514,7 @@ irqreturn_t switcher_power_ok_irq_handler(int irq, void *data); 
irqreturn_t wdog_snarl_irq_handler(int irq, void *data);

irqreturn_t wdog_bark_irq_handler(int irq, void *data);

irqreturn_t typec_or_rid_detection_change_irq_handler(int irq, void *data);

irqreturn_t temp_change_irq_handler(int irq, void *data);



int smblib_get_prop_input_suspend(struct smb_charger *chg,

				union power_supply_propval *val);

drivers/power/supply/qcom/smb5-reg.h

+1 −0
Original line number Diff line number Diff line
@@ -464,6 +464,7 @@ enum { 
#define AICL_RERUN_TIME_12S_VAL			0x01



#define MISC_THERMREG_SRC_CFG_REG		(MISC_BASE + 0x70)

#define THERMREG_SW_ICL_ADJUST_BIT		BIT(7)

#define THERMREG_SMB_ADC_SRC_EN_BIT		BIT(5)

#define THERMREG_DIE_CMP_SRC_EN_BIT		BIT(0)