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Commit ca6ca91d authored by Timothy Baldwin's avatar Timothy Baldwin Committed by Russell King
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[ARM] 2875/1: Data Abort fixes 



Patch from Timothy Baldwin

All data aborts are treated as read accesses. The existing code updates the wrong bit of r1, also the comments are wrong in that the sense of the L bit is inverted.

Signed-off-by: default avatarTimothy E. Baldwin <T.E.Baldwin99@members.leeds.ac.uk>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent 9bed07d0

arch/arm/mm/proc-arm6_7.S

+4 −4
Original line number Diff line number Diff line
@@ -38,8 +38,8 @@ ENTRY(cpu_arm7_data_abort) 
	mrc	p15, 0, r1, c5, c0, 0		@ get FSR

	mrc	p15, 0, r0, c6, c0, 0		@ get FAR

	ldr	r8, [r0]			@ read arm instruction

	tst	r8, #1 << 20			@ L = 1 -> write?

	orreq	r1, r1, #1 << 8			@ yes.

	tst	r8, #1 << 20			@ L = 0 -> write?

	orreq	r1, r1, #1 << 11		@ yes.

	and	r7, r8, #15 << 24

	add	pc, pc, r7, lsr #22		@ Now branch to the relevant processing routine

	nop
@@ -71,8 +71,8 @@ ENTRY(cpu_arm6_data_abort) 
	mrc	p15, 0, r1, c5, c0, 0		@ get FSR

	mrc	p15, 0, r0, c6, c0, 0		@ get FAR

	ldr	r8, [r2]			@ read arm instruction

	tst	r8, #1 << 20			@ L = 1 -> write?

	orreq	r1, r1, #1 << 8			@ yes.

	tst	r8, #1 << 20			@ L = 0 -> write?

	orreq	r1, r1, #1 << 11		@ yes.

	and	r7, r8, #14 << 24

	teq	r7, #8 << 24			@ was it ldm/stm

	movne	pc, lr