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Commit ca113f6b authored by Alex Deucher's avatar Alex Deucher
Browse files

drm/radeon: consolidate sdma hdp flushing code for CIK 



It's used in several places so move to a common shared
function.

Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 780f5ddd

drivers/gpu/drm/radeon/cik_sdma.c

+23 −12
Original line number Diff line number Diff line
@@ -156,6 +156,27 @@ void cik_sdma_ring_ib_execute(struct radeon_device *rdev, 


}



/**

 * cik_sdma_hdp_flush_ring_emit - emit an hdp flush on the DMA ring

 *

 * @rdev: radeon_device pointer

 * @ridx: radeon ring index

 *

 * Emit an hdp flush packet on the requested DMA ring.

 */

static void cik_sdma_hdp_flush_ring_emit(struct radeon_device *rdev,

					 int ridx)

{

	struct radeon_ring *ring = &rdev->ring[ridx];



	/* We should be using the new POLL_REG_MEM special op packet here

	 * but it causes sDMA to hang sometimes

	 */

	radeon_ring_write(ring, SDMA_PACKET(SDMA_OPCODE_SRBM_WRITE, 0, 0xf000));

	radeon_ring_write(ring, HDP_MEM_COHERENCY_FLUSH_CNTL >> 2);

	radeon_ring_write(ring, 0);

}



/**

 * cik_sdma_fence_ring_emit - emit a fence on the DMA ring

 *
@@ -180,12 +201,7 @@ void cik_sdma_fence_ring_emit(struct radeon_device *rdev, 
	/* generate an interrupt */

	radeon_ring_write(ring, SDMA_PACKET(SDMA_OPCODE_TRAP, 0, 0));

	/* flush HDP */

	/* We should be using the new POLL_REG_MEM special op packet here

	 * but it causes sDMA to hang sometimes

	 */

	radeon_ring_write(ring, SDMA_PACKET(SDMA_OPCODE_SRBM_WRITE, 0, 0xf000));

	radeon_ring_write(ring, HDP_MEM_COHERENCY_FLUSH_CNTL >> 2);

	radeon_ring_write(ring, 0);

	cik_sdma_hdp_flush_ring_emit(rdev, fence->ring);

}



/**
@@ -816,12 +832,7 @@ void cik_dma_vm_flush(struct radeon_device *rdev, int ridx, struct radeon_vm *vm 
	radeon_ring_write(ring, VMID(0));



	/* flush HDP */

	/* We should be using the new POLL_REG_MEM special op packet here

	 * but it causes sDMA to hang sometimes

	 */

	radeon_ring_write(ring, SDMA_PACKET(SDMA_OPCODE_SRBM_WRITE, 0, 0xf000));

	radeon_ring_write(ring, HDP_MEM_COHERENCY_FLUSH_CNTL >> 2);

	radeon_ring_write(ring, 0);

	cik_sdma_hdp_flush_ring_emit(rdev, ridx);



	/* flush TLB */

	radeon_ring_write(ring, SDMA_PACKET(SDMA_OPCODE_SRBM_WRITE, 0, 0xf000));