Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit c6b2ae2e authored by Govind Singh's avatar Govind Singh Committed by Gerrit - the friendly Code Review server
Browse files

BACKPORT: ath10k: enable bus layer suspend/resume for WCN3990



Register snoc bus layer suspend/resume PM ops and configure
the wakeup source(CE2) for the device.

Testing:
    Tested on WCN3990 HW.
    Tested FW: WLAN.HL.2.0-01192-QCAHLSWMTPLZ-1.

Signed-off-by: default avatarGovind Singh <govinds@codeaurora.org>
Signed-off-by: default avatarKalle Valo <kvalo@codeaurora.org>
[govinds@codeaurora.org: fix trivial merge conflicts]
Change-Id: I1116b98f82197a1ee28e094e3b1804aa50227e23
Git-commit: 185be1c66469b2c31bd3a0502b3cdf0e654f95eb
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/ath.git


Signed-off-by: default avatarGovind Singh <govinds@codeaurora.org>
parent cc6b1066
Loading
Loading
Loading
Loading
+45 −0
Original line number Diff line number Diff line
@@ -30,6 +30,7 @@

#define ATH10K_SNOC_RX_POST_RETRY_MS 50
#define CE_POLL_PIPE 4
#define ATH10K_SNOC_WAKE_IRQ 2

static char *const ce_name[] = {
	"WLAN_CE_0",
@@ -1038,6 +1039,46 @@ static int ath10k_snoc_hif_set_target_log_mode(struct ath10k *ar,
	return ath10k_qmi_set_fw_log_mode(ar, fw_dbg_mode);
}

#ifdef CONFIG_PM
static int ath10k_snoc_hif_suspend(struct ath10k *ar)
{
	struct ath10k_snoc *ar_snoc = ath10k_snoc_priv(ar);
	int ret;

	if (!device_may_wakeup(ar->dev))
		return -EPERM;

	ret = enable_irq_wake(ar_snoc->ce_irqs[ATH10K_SNOC_WAKE_IRQ].irq_line);
	if (ret) {
		ath10k_err(ar, "failed to enable wakeup irq :%d\n", ret);
		return ret;
	}

	ath10k_dbg(ar, ATH10K_DBG_SNOC, "snoc device suspended\n");

	return ret;
}

static int ath10k_snoc_hif_resume(struct ath10k *ar)
{
	struct ath10k_snoc *ar_snoc = ath10k_snoc_priv(ar);
	int ret;

	if (!device_may_wakeup(ar->dev))
		return -EPERM;

	ret = disable_irq_wake(ar_snoc->ce_irqs[ATH10K_SNOC_WAKE_IRQ].irq_line);
	if (ret) {
		ath10k_err(ar, "failed to disable wakeup irq: %d\n", ret);
		return ret;
	}

	ath10k_dbg(ar, ATH10K_DBG_SNOC, "snoc device resumed\n");

	return ret;
}
#endif

static const struct ath10k_hif_ops ath10k_snoc_hif_ops = {
	.read32		= ath10k_snoc_read32,
	.write32	= ath10k_snoc_write32,
@@ -1052,6 +1093,10 @@ static const struct ath10k_hif_ops ath10k_snoc_hif_ops = {
	.get_free_queue_number	= ath10k_snoc_hif_get_free_queue_number,
	.get_target_info	= ath10k_snoc_hif_get_target_info,
	.set_target_log_mode    = ath10k_snoc_hif_set_target_log_mode,
#ifdef CONFIG_PM
	.suspend                = ath10k_snoc_hif_suspend,
	.resume                 = ath10k_snoc_hif_resume,
#endif
};

static const struct ath10k_bus_ops ath10k_snoc_bus_ops = {