Loading Documentation/devicetree/bindings/sound/wcd_codec.txt +3 −0 Original line number Diff line number Diff line Loading @@ -79,6 +79,9 @@ Required properties: enumeration address. Optional properties: - qcom,cdc-ext-clk-rate - Specifies the clock rate of external crystal which is sourced to codec mclk in HZ. This should be either same as qcom,cdc-mclk-clk-rate or its double. - cdc-dmic-sample-rate: Specifies the sample rate of digital mic in HZ. The values for 9.6MHZ mclk can be 2400000 Hz, 3200000 Hz and 4800000 Hz. The values for 12.288MHz mclk can be Loading arch/arm64/boot/dts/qcom/qcs403-ext-pll-audio.dtsi 0 → 100644 +29 −0 Original line number Diff line number Diff line /* * Copyright (c) 2018, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and * only version 2 as published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ #include "qcs405-wsa-audio-overlay.dtsi" &soc { clock_audio_ext_pll: ext_pll_clk { compatible = "qcom,audio-ref-clk"; qcom,codec-ext-clk-src = <AUDIO_EXTERNAL_PLL>; #clock-cells = <1>; }; }; &wcd9335 { qcom,cdc-ext-clk-rate = <24576000>; qcom,cdc-mclk-clk-rate = <12288000>; clock-names = "wcd_clk"; clocks = <&clock_audio_ext_pll 0>; }; arch/arm64/boot/dts/qcom/qcs403-iot-sku4.dts +1 −0 Original line number Diff line number Diff line Loading @@ -15,6 +15,7 @@ #include "qcs403.dtsi" #include "qcs405-circular-pca9956.dtsi" #include "qcs403-ext-pll-audio.dtsi" / { model = "Qualcomm Technologies, Inc. QCS403 SSRD IOT AUDIO PLL"; Loading include/dt-bindings/clock/qcom,audio-ext-clk.h +2 −0 Original line number Diff line number Diff line Loading @@ -23,5 +23,7 @@ #define AUDIO_LPASS_MCLK_5 6 #define AUDIO_LPASS_MCLK_6 7 #define AUDIO_LPASS_MCLK_7 8 #define AUDIO_EXT_CLK_LPASS_NPA_RSC_ISLAND 9 #define AUDIO_EXTERNAL_PLL 10 #endif Loading
Documentation/devicetree/bindings/sound/wcd_codec.txt +3 −0 Original line number Diff line number Diff line Loading @@ -79,6 +79,9 @@ Required properties: enumeration address. Optional properties: - qcom,cdc-ext-clk-rate - Specifies the clock rate of external crystal which is sourced to codec mclk in HZ. This should be either same as qcom,cdc-mclk-clk-rate or its double. - cdc-dmic-sample-rate: Specifies the sample rate of digital mic in HZ. The values for 9.6MHZ mclk can be 2400000 Hz, 3200000 Hz and 4800000 Hz. The values for 12.288MHz mclk can be Loading
arch/arm64/boot/dts/qcom/qcs403-ext-pll-audio.dtsi 0 → 100644 +29 −0 Original line number Diff line number Diff line /* * Copyright (c) 2018, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and * only version 2 as published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ #include "qcs405-wsa-audio-overlay.dtsi" &soc { clock_audio_ext_pll: ext_pll_clk { compatible = "qcom,audio-ref-clk"; qcom,codec-ext-clk-src = <AUDIO_EXTERNAL_PLL>; #clock-cells = <1>; }; }; &wcd9335 { qcom,cdc-ext-clk-rate = <24576000>; qcom,cdc-mclk-clk-rate = <12288000>; clock-names = "wcd_clk"; clocks = <&clock_audio_ext_pll 0>; };
arch/arm64/boot/dts/qcom/qcs403-iot-sku4.dts +1 −0 Original line number Diff line number Diff line Loading @@ -15,6 +15,7 @@ #include "qcs403.dtsi" #include "qcs405-circular-pca9956.dtsi" #include "qcs403-ext-pll-audio.dtsi" / { model = "Qualcomm Technologies, Inc. QCS403 SSRD IOT AUDIO PLL"; Loading
include/dt-bindings/clock/qcom,audio-ext-clk.h +2 −0 Original line number Diff line number Diff line Loading @@ -23,5 +23,7 @@ #define AUDIO_LPASS_MCLK_5 6 #define AUDIO_LPASS_MCLK_6 7 #define AUDIO_LPASS_MCLK_7 8 #define AUDIO_EXT_CLK_LPASS_NPA_RSC_ISLAND 9 #define AUDIO_EXTERNAL_PLL 10 #endif