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Commit c5e3548c authored by Jordan Crouse's avatar Jordan Crouse Committed by Rob Clark
Browse files

drm/msm/adreno: Define a list of firmware files to load per target 



The number and type of firmware files required differs for each
target. Instead of using a fixed struct member for each possible
firmware file use a generic list of files that should be loaded
on boot.  Use some semi-target specific enums to help each target
find the appropriate firmware(s) that it needs to load.

Signed-off-by: default avatarJordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: default avatarRob Clark <robdclark@gmail.com>
parent f306953f

drivers/gpu/drm/msm/adreno/a3xx_gpu.c

+4 −4
Original line number Diff line number Diff line
@@ -256,8 +256,8 @@ static int a3xx_hw_init(struct msm_gpu *gpu) 
	 */



	/* Load PM4: */

	ptr = (uint32_t *)(adreno_gpu->pm4->data);

	len = adreno_gpu->pm4->size / 4;

	ptr = (uint32_t *)(adreno_gpu->fw[ADRENO_FW_PM4]->data);

	len = adreno_gpu->fw[ADRENO_FW_PM4]->size / 4;

	DBG("loading PM4 ucode version: %x", ptr[1]);



	gpu_write(gpu, REG_AXXX_CP_DEBUG,
@@ -268,8 +268,8 @@ static int a3xx_hw_init(struct msm_gpu *gpu) 
		gpu_write(gpu, REG_AXXX_CP_ME_RAM_DATA, ptr[i]);



	/* Load PFP: */

	ptr = (uint32_t *)(adreno_gpu->pfp->data);

	len = adreno_gpu->pfp->size / 4;

	ptr = (uint32_t *)(adreno_gpu->fw[ADRENO_FW_PFP]->data);

	len = adreno_gpu->fw[ADRENO_FW_PFP]->size / 4;

	DBG("loading PFP ucode version: %x", ptr[5]);



	gpu_write(gpu, REG_A3XX_CP_PFP_UCODE_ADDR, 0);

drivers/gpu/drm/msm/adreno/a4xx_gpu.c

+4 −4
Original line number Diff line number Diff line
@@ -274,16 +274,16 @@ static int a4xx_hw_init(struct msm_gpu *gpu) 
		return ret;



	/* Load PM4: */

	ptr = (uint32_t *)(adreno_gpu->pm4->data);

	len = adreno_gpu->pm4->size / 4;

	ptr = (uint32_t *)(adreno_gpu->fw[ADRENO_FW_PM4]->data);

	len = adreno_gpu->fw[ADRENO_FW_PM4]->size / 4;

	DBG("loading PM4 ucode version: %u", ptr[0]);

	gpu_write(gpu, REG_A4XX_CP_ME_RAM_WADDR, 0);

	for (i = 1; i < len; i++)

		gpu_write(gpu, REG_A4XX_CP_ME_RAM_DATA, ptr[i]);



	/* Load PFP: */

	ptr = (uint32_t *)(adreno_gpu->pfp->data);

	len = adreno_gpu->pfp->size / 4;

	ptr = (uint32_t *)(adreno_gpu->fw[ADRENO_FW_PFP]->data);

	len = adreno_gpu->fw[ADRENO_FW_PFP]->size / 4;

	DBG("loading PFP ucode version: %u", ptr[0]);



	gpu_write(gpu, REG_A4XX_CP_PFP_UCODE_ADDR, 0);

drivers/gpu/drm/msm/adreno/a5xx_debugfs.c

+5 −8
Original line number Diff line number Diff line
@@ -123,15 +123,12 @@ reset_set(void *data, u64 val) 


	mutex_lock(&dev->struct_mutex);



	if (adreno_gpu->pm4) {

		release_firmware(adreno_gpu->pm4);

		adreno_gpu->pm4 = NULL;

	}

	release_firmware(adreno_gpu->fw[ADRENO_FW_PM4]);

	adreno_gpu->fw[ADRENO_FW_PM4] = NULL;



	release_firmware(adreno_gpu->fw[ADRENO_FW_PFP]);

	adreno_gpu->fw[ADRENO_FW_PFP] = NULL;



	if (adreno_gpu->pfp) {

		release_firmware(adreno_gpu->pfp);

		adreno_gpu->pfp = NULL;

	}

	if (a5xx_gpu->pm4_bo) {

		if (a5xx_gpu->pm4_iova)

			msm_gem_put_iova(a5xx_gpu->pm4_bo, gpu->aspace);

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

+4 −4
Original line number Diff line number Diff line
@@ -523,8 +523,8 @@ static int a5xx_ucode_init(struct msm_gpu *gpu) 
	int ret;



	if (!a5xx_gpu->pm4_bo) {

		a5xx_gpu->pm4_bo = a5xx_ucode_load_bo(gpu, adreno_gpu->pm4,

			&a5xx_gpu->pm4_iova);

		a5xx_gpu->pm4_bo = a5xx_ucode_load_bo(gpu,

			adreno_gpu->fw[ADRENO_FW_PM4], &a5xx_gpu->pm4_iova);



		if (IS_ERR(a5xx_gpu->pm4_bo)) {

			ret = PTR_ERR(a5xx_gpu->pm4_bo);
@@ -536,8 +536,8 @@ static int a5xx_ucode_init(struct msm_gpu *gpu) 
	}



	if (!a5xx_gpu->pfp_bo) {

		a5xx_gpu->pfp_bo = a5xx_ucode_load_bo(gpu, adreno_gpu->pfp,

			&a5xx_gpu->pfp_iova);

		a5xx_gpu->pfp_bo = a5xx_ucode_load_bo(gpu,

			adreno_gpu->fw[ADRENO_FW_PFP], &a5xx_gpu->pfp_iova);



		if (IS_ERR(a5xx_gpu->pfp_bo)) {

			ret = PTR_ERR(a5xx_gpu->pfp_bo);

drivers/gpu/drm/msm/adreno/a5xx_power.c

+7 −19
Original line number Diff line number Diff line
@@ -261,7 +261,6 @@ void a5xx_gpmu_ucode_init(struct msm_gpu *gpu) 
	struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);

	struct a5xx_gpu *a5xx_gpu = to_a5xx_gpu(adreno_gpu);

	struct drm_device *drm = gpu->dev;

	const struct firmware *fw;

	uint32_t dwords = 0, offset = 0, bosize;

	unsigned int *data, *ptr, *cmds;

	unsigned int cmds_size;
@@ -269,15 +268,7 @@ void a5xx_gpmu_ucode_init(struct msm_gpu *gpu) 
	if (a5xx_gpu->gpmu_bo)

		return;



	/* Get the firmware */

	fw = adreno_request_fw(adreno_gpu, adreno_gpu->info->powerfw);

	if (IS_ERR(fw)) {

		DRM_ERROR("%s: Could not get GPMU firmware. GPMU will not be active\n",

			gpu->name);

		return;

	}



	data = (unsigned int *) fw->data;

	data = (unsigned int *) adreno_gpu->fw[ADRENO_FW_GPMU]->data;



	/*

	 * The first dword is the size of the remaining data in dwords. Use it
@@ -285,12 +276,14 @@ void a5xx_gpmu_ucode_init(struct msm_gpu *gpu) 
	 * the firmware that we read

	 */



	if (fw->size < 8 || (data[0] < 2) || (data[0] >= (fw->size >> 2)))

		goto out;

	if (adreno_gpu->fw[ADRENO_FW_GPMU]->size < 8 ||

		(data[0] < 2) || (data[0] >=

			(adreno_gpu->fw[ADRENO_FW_GPMU]->size >> 2)))

		return;



	/* The second dword is an ID - look for 2 (GPMU_FIRMWARE_ID) */

	if (data[1] != 2)

		goto out;

		return;



	cmds = data + data[2] + 3;

	cmds_size = data[0] - data[2] - 2;
@@ -325,8 +318,7 @@ void a5xx_gpmu_ucode_init(struct msm_gpu *gpu) 
	msm_gem_put_vaddr(a5xx_gpu->gpmu_bo);

	a5xx_gpu->gpmu_dwords = dwords;



	goto out;



	return;

err:

	if (a5xx_gpu->gpmu_iova)

		msm_gem_put_iova(a5xx_gpu->gpmu_bo, gpu->aspace);
@@ -336,8 +328,4 @@ void a5xx_gpmu_ucode_init(struct msm_gpu *gpu) 
	a5xx_gpu->gpmu_bo = NULL;

	a5xx_gpu->gpmu_iova = 0;

	a5xx_gpu->gpmu_dwords = 0;



out:

	/* No need to keep that firmware laying around anymore */

	release_firmware(fw);

}