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Commit c5975e02 authored by Sujeev Dias's avatar Sujeev Dias
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mhi_bus: controller: MHI support for QCOM modems



QCOM PCIe based modems uses MHI as the communication protocol.
MHI control driver is the bus master for such modems. As the bus
master driver, it oversees power management operations
such as suspend, resume, powering on and off the device.

CRs-Fixed: 2204910
Change-Id: I836258dd3ce8d81add78915aad0c6866ce1681a5
Signed-off-by: default avatarSujeev Dias <sdias@codeaurora.org>
parent 371e6bb5
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Qualcomm Technologies Inc MHI Bus controller

MHI control driver enables clients to communicate with external mode
using MHI protocol.

==============
Node Structure
==============

Main node properties:

- compatible
  Usage: required
  Value type: <string>
  Definition: "qcom,mhi"

- qcom,pci-dev-id
  Usage: optional
  Value type: <u32>
  Definition: PCIe device id of external modem to bind. If not set, any
	device is compatible with this node.

- qcom,pci-domain
  Usage: required
  Value type: <u32>
  Definition: PCIe root complex external modem connected to

- qcom,pci-bus
  Usage: required
  Value type: <u32>
  Definition: PCIe bus external modem connected to

- qcom,pci-slot
  Usage: required
  Value type: <u32>
  Definition: PCIe slot as assigned by pci framework to external modem

- qcom,smmu-cfg
  Usage: required
  Value type: <u32>
  Definition: Required SMMU configuration bitmask for PCIe bus.
	BIT mask:
	BIT(0) : Attach address mapping to endpoint device
	BIT(1) : Set attribute S1_BYPASS
	BIT(2) : Set attribute FAST
	BIT(3) : Set attribute ATOMIC
	BIT(4) : Set attribute FORCE_COHERENT

- qcom,addr-win
  Usage: required if SMMU S1 translation is enabled
  Value type: Array of <u64>
  Definition: Pair of values describing iova start and stop address

- qcom,msm-bus,name
  Usage: required
  Value type: <string>
  Definition: string representing the bus scale client name to register

- qcom,msm-bus,num-cases
  Usage: required
  Value type: <u32>
  Definition: Must be set to two, MHI support two scales

- qcom,msm-bus,num-paths
  Usage: required
  Value type: <u32>
  Definition: Total number of master-slave pairs MHI host will vote. Must be set
	to one.

- qcom,msm-bus,vectors-KBps
  Usage: required
  Value type: Array of <u32>
  Definition: Array of tuples which define the bus bandwidth requirements.
	Each tuple is of length 4, values are master-id, slave-id,
	arbitrated bandwidth in KBps, and instantaneous bandwidth in
	KBps.

- esoc-names
  Usage: optional
  Value type: <string>
  Definition: if external modem managed by esoc framework, set string to "mdm"

- esoc-0
  Usage: required if device is managed by esoc framework
  Value type: phandle
  Definition: A esoc phandle pointing to external modem

- MHI bus settings
  Usage: required
  Values: as defined by mhi.txt
  Definition: Per definition of devicetree/bindings/bus/mhi.txt, define device
	specific MHI configuration parameters.

========
Example:
========
qcom,mhi {
	compatible = "qcom,mhi";
	qcom,pci-domain = <0>;
	qcom,pci-bus = <1>;
	qcom,pci-slot = <0>;
	qcom,smmu-cfg = <0x3d>;
	qcom,addr-win = <0x0 0x20000000 0x0 0x3fffffff>;
	qcom,msm-bus,name = "mhi";
	qcom,msm-bus,num-cases = <2>;
	qcom,msm-bus,num-paths = <1>;
	qcom,msm-bus,vectors-KBps = <45 512 0 0>,
				    <45 512 1200000000 650000000>;
	<mhi bus configurations>
};
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@@ -201,4 +201,6 @@ config MHI_DEBUG
	   throughput as individual MHI packets and state transitions
	   will be logged.

source drivers/bus/mhi/controllers/Kconfig

endmenu
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@@ -4,5 +4,5 @@

# core layer
obj-y += core/
#obj-y += controllers/
obj-y += controllers/
#obj-y += devices/
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menu "MHI controllers"

config MHI_QCOM
       tristate "MHI QCOM"
       depends on MHI_BUS
       help
	  If you say yes to this option, MHI bus support for QCOM modem chipsets
	  will be enabled.

endmenu
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obj-$(CONFIG_MHI_QCOM) += mhi_qcom.o mhi_arch_qcom.o
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