Loading drivers/gpu/drm/msm/Kconfig +2 −1 Original line number Diff line number Diff line Loading @@ -3,7 +3,7 @@ config DRM_MSM tristate "MSM DRM" depends on DRM depends on ARCH_QCOM || (ARM && COMPILE_TEST) depends on OF && COMMON_CLK depends on OF depends on MMU select QCOM_MDT_LOADER if ARCH_QCOM select REGULATOR Loading Loading @@ -41,6 +41,7 @@ config DRM_MSM_HDMI_HDCP config DRM_MSM_HDMI bool "Enable HDMI support in MSM DRM driver" depends on DRM_MSM depends on COMMON_CLK default n help Compile in support for HDMI driver in msm drm Loading drivers/gpu/drm/msm/dp/dp_aux.c +11 −0 Original line number Diff line number Diff line Loading @@ -332,6 +332,7 @@ static void dp_aux_transfer_helper(struct dp_aux_private *aux, struct drm_dp_aux_msg helper_msg; u32 const message_size = 0x10; u32 const segment_address = 0x30; u32 const edid_block_length = 0x80; bool i2c_mot = input_msg->request & DP_AUX_I2C_MOT; bool i2c_read = input_msg->request & (DP_AUX_I2C_READ & DP_AUX_NATIVE_READ); Loading @@ -339,6 +340,15 @@ static void dp_aux_transfer_helper(struct dp_aux_private *aux, if (!i2c_mot || !i2c_read || (input_msg->size == 0)) return; /* * Sending the segment value and EDID offset will be performed * from the DRM upstream EDID driver for each block. Avoid * duplicate AUX transactions related to this while reading the * first 16 bytes of each block. */ if (!(aux->offset % edid_block_length)) goto end; aux->read = false; aux->cmd_busy = true; aux->no_send_addr = true; Loading Loading @@ -371,6 +381,7 @@ static void dp_aux_transfer_helper(struct dp_aux_private *aux, helper_msg.buffer = &aux->offset; helper_msg.size = 1; dp_aux_cmd_fifo_tx(aux, &helper_msg); end: aux->offset += message_size; if (aux->offset == 0x80 || aux->offset == 0x100) Loading drivers/gpu/drm/msm/dp/dp_debug.c +18 −18 Original line number Diff line number Diff line Loading @@ -345,12 +345,24 @@ static ssize_t dp_debug_read_connected(struct file *file, return len; } static int dp_debug_check_buffer_overflow(int rc, int *max_size, int *len) { if (rc >= *max_size) { pr_err("buffer overflow\n"); return -EINVAL; } *len += rc; *max_size = SZ_4K - *len; return 0; } static ssize_t dp_debug_read_edid_modes(struct file *file, char __user *user_buff, size_t count, loff_t *ppos) { struct dp_debug_private *debug = file->private_data; char *buf; u32 len = 0; u32 len = 0, ret = 0, max_size = SZ_4K; int rc = 0; struct drm_connector *connector; struct drm_display_mode *mode; Loading Loading @@ -380,12 +392,12 @@ static ssize_t dp_debug_read_edid_modes(struct file *file, mutex_lock(&connector->dev->mode_config.mutex); list_for_each_entry(mode, &connector->modes, head) { len += snprintf(buf + len, SZ_4K - len, "%s %d %d %d %d %d %d %d %d %d %d 0x%x\n", ret = snprintf(buf + len, max_size, "%s %d %d %d %d %d 0x%x\n", mode->name, mode->vrefresh, mode->picture_aspect_ratio, mode->hdisplay, mode->hsync_start, mode->hsync_end, mode->htotal, mode->vdisplay, mode->vsync_start, mode->vsync_end, mode->vtotal, mode->flags); mode->htotal, mode->vtotal, mode->clock, mode->flags); if (dp_debug_check_buffer_overflow(ret, &max_size, &len)) break; } mutex_unlock(&connector->dev->mode_config.mutex); Loading @@ -403,18 +415,6 @@ static ssize_t dp_debug_read_edid_modes(struct file *file, return rc; } static int dp_debug_check_buffer_overflow(int rc, int *max_size, int *len) { if (rc >= *max_size) { pr_err("buffer overflow\n"); return -EINVAL; } *len += rc; *max_size = SZ_4K - *len; return 0; } static ssize_t dp_debug_read_info(struct file *file, char __user *user_buff, size_t count, loff_t *ppos) { Loading drivers/gpu/drm/msm/dp/dp_usbpd.c +6 −2 Original line number Diff line number Diff line Loading @@ -352,11 +352,15 @@ static void dp_usbpd_response_cb(struct usbpd_svid_handler *hdlr, u8 cmd, pd->vdo = *vdos; dp_usbpd_get_status(pd); if (!pd->dp_usbpd.alt_mode_cfg_done) { if (pd->dp_usbpd.port & BIT(1)) dp_usbpd_send_event(pd, DP_USBPD_EVT_CONFIGURE); break; } if (pd->dp_cb && pd->dp_cb->attention) pd->dp_cb->attention(pd->dev); if (!pd->dp_usbpd.alt_mode_cfg_done) dp_usbpd_send_event(pd, DP_USBPD_EVT_CONFIGURE); break; case DP_USBPD_VDM_STATUS: pd->vdo = *vdos; Loading drivers/gpu/drm/msm/dsi-staging/dsi_ctrl.c +65 −5 Original line number Diff line number Diff line Loading @@ -2222,6 +2222,8 @@ static irqreturn_t dsi_ctrl_isr(int irq, void *ptr) if (dsi_ctrl->hw.ops.clear_interrupt_status) dsi_ctrl->hw.ops.clear_interrupt_status(&dsi_ctrl->hw, 0x0); SDE_EVT32_IRQ(dsi_ctrl->cell_index, status, errors); /* handle DSI error recovery */ if (status & DSI_ERROR) dsi_ctrl_handle_error_status(dsi_ctrl, errors); Loading Loading @@ -2281,7 +2283,7 @@ static irqreturn_t dsi_ctrl_isr(int irq, void *ptr) * @dsi_ctrl: Pointer to associated dsi_ctrl structure * Returns: Zero on success */ static int dsi_ctrl_setup_isr(struct dsi_ctrl *dsi_ctrl) static int _dsi_ctrl_setup_isr(struct dsi_ctrl *dsi_ctrl) { int irq_num, rc; Loading Loading @@ -2475,8 +2477,6 @@ int dsi_ctrl_host_init(struct dsi_ctrl *dsi_ctrl, bool is_splash_enabled) } } dsi_ctrl_setup_isr(dsi_ctrl); dsi_ctrl->hw.ops.enable_status_interrupts(&dsi_ctrl->hw, 0x0); dsi_ctrl->hw.ops.enable_error_interrupts(&dsi_ctrl->hw, 0xFF00E0); Loading @@ -2488,6 +2488,25 @@ int dsi_ctrl_host_init(struct dsi_ctrl *dsi_ctrl, bool is_splash_enabled) return rc; } /** * dsi_ctrl_isr_configure() - API to register/deregister dsi isr * @dsi_ctrl: DSI controller handle. * @enable: variable to control register/deregister isr */ void dsi_ctrl_isr_configure(struct dsi_ctrl *dsi_ctrl, bool enable) { if (!dsi_ctrl) return; mutex_lock(&dsi_ctrl->ctrl_lock); if (enable) _dsi_ctrl_setup_isr(dsi_ctrl); else _dsi_ctrl_destroy_isr(dsi_ctrl); mutex_unlock(&dsi_ctrl->ctrl_lock); } int dsi_ctrl_soft_reset(struct dsi_ctrl *dsi_ctrl) { if (!dsi_ctrl) Loading Loading @@ -2563,8 +2582,6 @@ int dsi_ctrl_host_deinit(struct dsi_ctrl *dsi_ctrl) mutex_lock(&dsi_ctrl->ctrl_lock); _dsi_ctrl_destroy_isr(dsi_ctrl); rc = dsi_ctrl_check_state(dsi_ctrl, DSI_CTRL_OP_HOST_INIT, 0x0); if (rc) { pr_err("[DSI_%d] Controller state check failed, rc=%d\n", Loading Loading @@ -2812,6 +2829,27 @@ static void _dsi_ctrl_cache_misr(struct dsi_ctrl *dsi_ctrl) dsi_ctrl->misr_cache); } /** * dsi_ctrl_get_host_engine_init_state() - Return host init state * @dsi_ctrl: DSI controller handle. * @state: Controller initialization state * * Return: error code. */ int dsi_ctrl_get_host_engine_init_state(struct dsi_ctrl *dsi_ctrl, bool *state) { if (!dsi_ctrl || !state) { pr_err("Invalid Params\n"); return -EINVAL; } mutex_lock(&dsi_ctrl->ctrl_lock); *state = dsi_ctrl->current_state.host_initialized; mutex_unlock(&dsi_ctrl->ctrl_lock); return 0; } /** * dsi_ctrl_update_host_engine_state_for_cont_splash() - Loading Loading @@ -3254,6 +3292,28 @@ u32 dsi_ctrl_collect_misr(struct dsi_ctrl *dsi_ctrl) return misr; } /** * dsi_ctrl_irq_update() - Put a irq vote to process DSI error * interrupts at any time. * @dsi_ctrl: DSI controller handle. * @enable: variable to enable/disable irq */ void dsi_ctrl_irq_update(struct dsi_ctrl *dsi_ctrl, bool enable) { if (!dsi_ctrl) return; mutex_lock(&dsi_ctrl->ctrl_lock); if (enable) dsi_ctrl_enable_status_interrupt(dsi_ctrl, DSI_SINT_ERROR, NULL); else dsi_ctrl_disable_status_interrupt(dsi_ctrl, DSI_SINT_ERROR); mutex_unlock(&dsi_ctrl->ctrl_lock); } /** * dsi_ctrl_drv_register() - register platform driver for dsi controller */ Loading Loading
drivers/gpu/drm/msm/Kconfig +2 −1 Original line number Diff line number Diff line Loading @@ -3,7 +3,7 @@ config DRM_MSM tristate "MSM DRM" depends on DRM depends on ARCH_QCOM || (ARM && COMPILE_TEST) depends on OF && COMMON_CLK depends on OF depends on MMU select QCOM_MDT_LOADER if ARCH_QCOM select REGULATOR Loading Loading @@ -41,6 +41,7 @@ config DRM_MSM_HDMI_HDCP config DRM_MSM_HDMI bool "Enable HDMI support in MSM DRM driver" depends on DRM_MSM depends on COMMON_CLK default n help Compile in support for HDMI driver in msm drm Loading
drivers/gpu/drm/msm/dp/dp_aux.c +11 −0 Original line number Diff line number Diff line Loading @@ -332,6 +332,7 @@ static void dp_aux_transfer_helper(struct dp_aux_private *aux, struct drm_dp_aux_msg helper_msg; u32 const message_size = 0x10; u32 const segment_address = 0x30; u32 const edid_block_length = 0x80; bool i2c_mot = input_msg->request & DP_AUX_I2C_MOT; bool i2c_read = input_msg->request & (DP_AUX_I2C_READ & DP_AUX_NATIVE_READ); Loading @@ -339,6 +340,15 @@ static void dp_aux_transfer_helper(struct dp_aux_private *aux, if (!i2c_mot || !i2c_read || (input_msg->size == 0)) return; /* * Sending the segment value and EDID offset will be performed * from the DRM upstream EDID driver for each block. Avoid * duplicate AUX transactions related to this while reading the * first 16 bytes of each block. */ if (!(aux->offset % edid_block_length)) goto end; aux->read = false; aux->cmd_busy = true; aux->no_send_addr = true; Loading Loading @@ -371,6 +381,7 @@ static void dp_aux_transfer_helper(struct dp_aux_private *aux, helper_msg.buffer = &aux->offset; helper_msg.size = 1; dp_aux_cmd_fifo_tx(aux, &helper_msg); end: aux->offset += message_size; if (aux->offset == 0x80 || aux->offset == 0x100) Loading
drivers/gpu/drm/msm/dp/dp_debug.c +18 −18 Original line number Diff line number Diff line Loading @@ -345,12 +345,24 @@ static ssize_t dp_debug_read_connected(struct file *file, return len; } static int dp_debug_check_buffer_overflow(int rc, int *max_size, int *len) { if (rc >= *max_size) { pr_err("buffer overflow\n"); return -EINVAL; } *len += rc; *max_size = SZ_4K - *len; return 0; } static ssize_t dp_debug_read_edid_modes(struct file *file, char __user *user_buff, size_t count, loff_t *ppos) { struct dp_debug_private *debug = file->private_data; char *buf; u32 len = 0; u32 len = 0, ret = 0, max_size = SZ_4K; int rc = 0; struct drm_connector *connector; struct drm_display_mode *mode; Loading Loading @@ -380,12 +392,12 @@ static ssize_t dp_debug_read_edid_modes(struct file *file, mutex_lock(&connector->dev->mode_config.mutex); list_for_each_entry(mode, &connector->modes, head) { len += snprintf(buf + len, SZ_4K - len, "%s %d %d %d %d %d %d %d %d %d %d 0x%x\n", ret = snprintf(buf + len, max_size, "%s %d %d %d %d %d 0x%x\n", mode->name, mode->vrefresh, mode->picture_aspect_ratio, mode->hdisplay, mode->hsync_start, mode->hsync_end, mode->htotal, mode->vdisplay, mode->vsync_start, mode->vsync_end, mode->vtotal, mode->flags); mode->htotal, mode->vtotal, mode->clock, mode->flags); if (dp_debug_check_buffer_overflow(ret, &max_size, &len)) break; } mutex_unlock(&connector->dev->mode_config.mutex); Loading @@ -403,18 +415,6 @@ static ssize_t dp_debug_read_edid_modes(struct file *file, return rc; } static int dp_debug_check_buffer_overflow(int rc, int *max_size, int *len) { if (rc >= *max_size) { pr_err("buffer overflow\n"); return -EINVAL; } *len += rc; *max_size = SZ_4K - *len; return 0; } static ssize_t dp_debug_read_info(struct file *file, char __user *user_buff, size_t count, loff_t *ppos) { Loading
drivers/gpu/drm/msm/dp/dp_usbpd.c +6 −2 Original line number Diff line number Diff line Loading @@ -352,11 +352,15 @@ static void dp_usbpd_response_cb(struct usbpd_svid_handler *hdlr, u8 cmd, pd->vdo = *vdos; dp_usbpd_get_status(pd); if (!pd->dp_usbpd.alt_mode_cfg_done) { if (pd->dp_usbpd.port & BIT(1)) dp_usbpd_send_event(pd, DP_USBPD_EVT_CONFIGURE); break; } if (pd->dp_cb && pd->dp_cb->attention) pd->dp_cb->attention(pd->dev); if (!pd->dp_usbpd.alt_mode_cfg_done) dp_usbpd_send_event(pd, DP_USBPD_EVT_CONFIGURE); break; case DP_USBPD_VDM_STATUS: pd->vdo = *vdos; Loading
drivers/gpu/drm/msm/dsi-staging/dsi_ctrl.c +65 −5 Original line number Diff line number Diff line Loading @@ -2222,6 +2222,8 @@ static irqreturn_t dsi_ctrl_isr(int irq, void *ptr) if (dsi_ctrl->hw.ops.clear_interrupt_status) dsi_ctrl->hw.ops.clear_interrupt_status(&dsi_ctrl->hw, 0x0); SDE_EVT32_IRQ(dsi_ctrl->cell_index, status, errors); /* handle DSI error recovery */ if (status & DSI_ERROR) dsi_ctrl_handle_error_status(dsi_ctrl, errors); Loading Loading @@ -2281,7 +2283,7 @@ static irqreturn_t dsi_ctrl_isr(int irq, void *ptr) * @dsi_ctrl: Pointer to associated dsi_ctrl structure * Returns: Zero on success */ static int dsi_ctrl_setup_isr(struct dsi_ctrl *dsi_ctrl) static int _dsi_ctrl_setup_isr(struct dsi_ctrl *dsi_ctrl) { int irq_num, rc; Loading Loading @@ -2475,8 +2477,6 @@ int dsi_ctrl_host_init(struct dsi_ctrl *dsi_ctrl, bool is_splash_enabled) } } dsi_ctrl_setup_isr(dsi_ctrl); dsi_ctrl->hw.ops.enable_status_interrupts(&dsi_ctrl->hw, 0x0); dsi_ctrl->hw.ops.enable_error_interrupts(&dsi_ctrl->hw, 0xFF00E0); Loading @@ -2488,6 +2488,25 @@ int dsi_ctrl_host_init(struct dsi_ctrl *dsi_ctrl, bool is_splash_enabled) return rc; } /** * dsi_ctrl_isr_configure() - API to register/deregister dsi isr * @dsi_ctrl: DSI controller handle. * @enable: variable to control register/deregister isr */ void dsi_ctrl_isr_configure(struct dsi_ctrl *dsi_ctrl, bool enable) { if (!dsi_ctrl) return; mutex_lock(&dsi_ctrl->ctrl_lock); if (enable) _dsi_ctrl_setup_isr(dsi_ctrl); else _dsi_ctrl_destroy_isr(dsi_ctrl); mutex_unlock(&dsi_ctrl->ctrl_lock); } int dsi_ctrl_soft_reset(struct dsi_ctrl *dsi_ctrl) { if (!dsi_ctrl) Loading Loading @@ -2563,8 +2582,6 @@ int dsi_ctrl_host_deinit(struct dsi_ctrl *dsi_ctrl) mutex_lock(&dsi_ctrl->ctrl_lock); _dsi_ctrl_destroy_isr(dsi_ctrl); rc = dsi_ctrl_check_state(dsi_ctrl, DSI_CTRL_OP_HOST_INIT, 0x0); if (rc) { pr_err("[DSI_%d] Controller state check failed, rc=%d\n", Loading Loading @@ -2812,6 +2829,27 @@ static void _dsi_ctrl_cache_misr(struct dsi_ctrl *dsi_ctrl) dsi_ctrl->misr_cache); } /** * dsi_ctrl_get_host_engine_init_state() - Return host init state * @dsi_ctrl: DSI controller handle. * @state: Controller initialization state * * Return: error code. */ int dsi_ctrl_get_host_engine_init_state(struct dsi_ctrl *dsi_ctrl, bool *state) { if (!dsi_ctrl || !state) { pr_err("Invalid Params\n"); return -EINVAL; } mutex_lock(&dsi_ctrl->ctrl_lock); *state = dsi_ctrl->current_state.host_initialized; mutex_unlock(&dsi_ctrl->ctrl_lock); return 0; } /** * dsi_ctrl_update_host_engine_state_for_cont_splash() - Loading Loading @@ -3254,6 +3292,28 @@ u32 dsi_ctrl_collect_misr(struct dsi_ctrl *dsi_ctrl) return misr; } /** * dsi_ctrl_irq_update() - Put a irq vote to process DSI error * interrupts at any time. * @dsi_ctrl: DSI controller handle. * @enable: variable to enable/disable irq */ void dsi_ctrl_irq_update(struct dsi_ctrl *dsi_ctrl, bool enable) { if (!dsi_ctrl) return; mutex_lock(&dsi_ctrl->ctrl_lock); if (enable) dsi_ctrl_enable_status_interrupt(dsi_ctrl, DSI_SINT_ERROR, NULL); else dsi_ctrl_disable_status_interrupt(dsi_ctrl, DSI_SINT_ERROR); mutex_unlock(&dsi_ctrl->ctrl_lock); } /** * dsi_ctrl_drv_register() - register platform driver for dsi controller */ Loading