Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit c2d1ac05 authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
Browse files

Merge "clk: qcom: Add support for 504MHz and 380MHz for ATOLL"

parents 10689788 932a6e17
Loading
Loading
Loading
Loading
+1 −1
Original line number Diff line number Diff line
@@ -331,7 +331,7 @@ static struct clk_alpha_pll_postdiv cam_cc_pll2_out_aux2 = {
/* 1080MHz configuration */
static const struct alpha_pll_config cam_cc_pll3_config = {
	.l = 0x38,
	.alpha = 0x4000,
	.frac = 0x4000,
	.user_ctl_val = 0x00000001,
	.user_ctl_hi_val = 0x00004805,
};
+1 −0
Original line number Diff line number Diff line
@@ -281,6 +281,7 @@ static const struct freq_tbl ftbl_gpu_cc_gx_gfx3d_clk_src[] = {
	F(267000000, P_CRC_DIV, 1, 0, 0),
	F(355000000, P_CRC_DIV, 1, 0, 0),
	F(430000000, P_CRC_DIV, 1, 0, 0),
	F(504000000, P_CRC_DIV, 1, 0, 0),
	F(565000000, P_CRC_DIV, 1, 0, 0),
	F(610000000, P_CRC_DIV, 1, 0, 0),
	F(650000000, P_CRC_DIV, 1, 0, 0),
+1 −0
Original line number Diff line number Diff line
@@ -121,6 +121,7 @@ static const struct freq_tbl ftbl_video_cc_venus_clk_src[] = {
	F(150000000, P_VIDEO_PLL0_OUT_MAIN, 4, 0, 0),
	F(270000000, P_VIDEO_PLL0_OUT_MAIN, 2.5, 0, 0),
	F(340000000, P_VIDEO_PLL0_OUT_MAIN, 2, 0, 0),
	F(380000000, P_VIDEO_PLL0_OUT_MAIN, 2, 0, 0),
	F(434000000, P_VIDEO_PLL0_OUT_MAIN, 2, 0, 0),
	F(500000000, P_VIDEO_PLL0_OUT_MAIN, 2, 0, 0),
	{ }