Loading Documentation/devicetree/bindings/dma/mtk-hsdma.txt 0 → 100644 +33 −0 Original line number Diff line number Diff line MediaTek High-Speed DMA Controller ================================== This device follows the generic DMA bindings defined in dma/dma.txt. Required properties: - compatible: Must be one of "mediatek,mt7622-hsdma": for MT7622 SoC "mediatek,mt7623-hsdma": for MT7623 SoC - reg: Should contain the register's base address and length. - interrupts: Should contain a reference to the interrupt used by this device. - clocks: Should be the clock specifiers corresponding to the entry in clock-names property. - clock-names: Should contain "hsdma" entries. - power-domains: Phandle to the power domain that the device is part of - #dma-cells: The length of the DMA specifier, must be <1>. This one cell in dmas property of a client device represents the channel number. Example: hsdma: dma-controller@1b007000 { compatible = "mediatek,mt7623-hsdma"; reg = <0 0x1b007000 0 0x1000>; interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_LOW>; clocks = <ðsys CLK_ETHSYS_HSDMA>; clock-names = "hsdma"; power-domains = <&scpsys MT2701_POWER_DOMAIN_ETH>; #dma-cells = <1>; }; DMA clients must use the format described in dma/dma.txt file. MAINTAINERS +9 −0 Original line number Diff line number Diff line Loading @@ -8785,6 +8785,15 @@ M: Sean Wang <sean.wang@mediatek.com> S: Maintained F: drivers/media/rc/mtk-cir.c MEDIATEK DMA DRIVER M: Sean Wang <sean.wang@mediatek.com> L: dmaengine@vger.kernel.org L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) L: linux-mediatek@lists.infradead.org (moderated for non-subscribers) S: Maintained F: Documentation/devicetree/bindings/dma/mtk-* F: drivers/dma/mediatek/ MEDIATEK PMIC LED DRIVER M: Sean Wang <sean.wang@mediatek.com> S: Maintained Loading drivers/dma/Kconfig +2 −0 Original line number Diff line number Diff line Loading @@ -643,6 +643,8 @@ config ZX_DMA # driver files source "drivers/dma/bestcomm/Kconfig" source "drivers/dma/mediatek/Kconfig" source "drivers/dma/qcom/Kconfig" source "drivers/dma/dw/Kconfig" Loading drivers/dma/Makefile +1 −0 Original line number Diff line number Diff line Loading @@ -76,5 +76,6 @@ obj-$(CONFIG_XGENE_DMA) += xgene-dma.o obj-$(CONFIG_ZX_DMA) += zx_dma.o obj-$(CONFIG_ST_FDMA) += st_fdma.o obj-y += mediatek/ obj-y += qcom/ obj-y += xilinx/ drivers/dma/mediatek/Kconfig 0 → 100644 +13 −0 Original line number Diff line number Diff line config MTK_HSDMA tristate "MediaTek High-Speed DMA controller support" depends on ARCH_MEDIATEK || COMPILE_TEST select DMA_ENGINE select DMA_VIRTUAL_CHANNELS ---help--- Enable support for High-Speed DMA controller on MediaTek SoCs. This controller provides the channels which is dedicated to memory-to-memory transfer to offload from CPU through ring- based descriptor management. Loading
Documentation/devicetree/bindings/dma/mtk-hsdma.txt 0 → 100644 +33 −0 Original line number Diff line number Diff line MediaTek High-Speed DMA Controller ================================== This device follows the generic DMA bindings defined in dma/dma.txt. Required properties: - compatible: Must be one of "mediatek,mt7622-hsdma": for MT7622 SoC "mediatek,mt7623-hsdma": for MT7623 SoC - reg: Should contain the register's base address and length. - interrupts: Should contain a reference to the interrupt used by this device. - clocks: Should be the clock specifiers corresponding to the entry in clock-names property. - clock-names: Should contain "hsdma" entries. - power-domains: Phandle to the power domain that the device is part of - #dma-cells: The length of the DMA specifier, must be <1>. This one cell in dmas property of a client device represents the channel number. Example: hsdma: dma-controller@1b007000 { compatible = "mediatek,mt7623-hsdma"; reg = <0 0x1b007000 0 0x1000>; interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_LOW>; clocks = <ðsys CLK_ETHSYS_HSDMA>; clock-names = "hsdma"; power-domains = <&scpsys MT2701_POWER_DOMAIN_ETH>; #dma-cells = <1>; }; DMA clients must use the format described in dma/dma.txt file.
MAINTAINERS +9 −0 Original line number Diff line number Diff line Loading @@ -8785,6 +8785,15 @@ M: Sean Wang <sean.wang@mediatek.com> S: Maintained F: drivers/media/rc/mtk-cir.c MEDIATEK DMA DRIVER M: Sean Wang <sean.wang@mediatek.com> L: dmaengine@vger.kernel.org L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) L: linux-mediatek@lists.infradead.org (moderated for non-subscribers) S: Maintained F: Documentation/devicetree/bindings/dma/mtk-* F: drivers/dma/mediatek/ MEDIATEK PMIC LED DRIVER M: Sean Wang <sean.wang@mediatek.com> S: Maintained Loading
drivers/dma/Kconfig +2 −0 Original line number Diff line number Diff line Loading @@ -643,6 +643,8 @@ config ZX_DMA # driver files source "drivers/dma/bestcomm/Kconfig" source "drivers/dma/mediatek/Kconfig" source "drivers/dma/qcom/Kconfig" source "drivers/dma/dw/Kconfig" Loading
drivers/dma/Makefile +1 −0 Original line number Diff line number Diff line Loading @@ -76,5 +76,6 @@ obj-$(CONFIG_XGENE_DMA) += xgene-dma.o obj-$(CONFIG_ZX_DMA) += zx_dma.o obj-$(CONFIG_ST_FDMA) += st_fdma.o obj-y += mediatek/ obj-y += qcom/ obj-y += xilinx/
drivers/dma/mediatek/Kconfig 0 → 100644 +13 −0 Original line number Diff line number Diff line config MTK_HSDMA tristate "MediaTek High-Speed DMA controller support" depends on ARCH_MEDIATEK || COMPILE_TEST select DMA_ENGINE select DMA_VIRTUAL_CHANNELS ---help--- Enable support for High-Speed DMA controller on MediaTek SoCs. This controller provides the channels which is dedicated to memory-to-memory transfer to offload from CPU through ring- based descriptor management.