Loading Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.txt +4 −2 Original line number Diff line number Diff line Synopsys DesignWare AMBA 2.0 Synchronous Serial Interface. Required properties: - compatible : "snps,dw-apb-ssi" - reg : The register base for the controller. - compatible : "snps,dw-apb-ssi" or "mscc,<soc>-spi", where soc is "ocelot" or "jaguar2" - reg : The register base for the controller. For "mscc,<soc>-spi", a second register set is required (named ICPU_CFG:SPI_MST) - interrupts : One interrupt, used by the controller. - #address-cells : <1>, as required by generic SPI binding. - #size-cells : <0>, also as required by generic SPI binding. Loading Documentation/devicetree/bindings/spi/spi-rockchip.txt +1 −0 Original line number Diff line number Diff line Loading @@ -7,6 +7,7 @@ Required Properties: - compatible: should be one of the following. "rockchip,rv1108-spi" for rv1108 SoCs. "rockchip,px30-spi", "rockchip,rk3066-spi" for px30 SoCs. "rockchip,rk3036-spi" for rk3036 SoCS. "rockchip,rk3066-spi" for rk3066 SoCs. "rockchip,rk3188-spi" for rk3188 SoCs. Loading Documentation/devicetree/bindings/spi/spi-uniphier.txt 0 → 100644 +22 −0 Original line number Diff line number Diff line Socionext UniPhier SPI controller driver UniPhier SoCs have SCSSI which supports SPI single channel. Required properties: - compatible: should be "socionext,uniphier-scssi" - reg: address and length of the spi master registers - #address-cells: must be <1>, see spi-bus.txt - #size-cells: must be <0>, see spi-bus.txt - clocks: A phandle to the clock for the device. - resets: A phandle to the reset control for the device. Example: spi0: spi@54006000 { compatible = "socionext,uniphier-scssi"; reg = <0x54006000 0x100>; #address-cells = <1>; #size-cells = <0>; clocks = <&peri_clk 11>; resets = <&peri_rst 11>; }; drivers/mtd/devices/m25p80.c +3 −0 Original line number Diff line number Diff line Loading @@ -202,6 +202,9 @@ static int m25p_probe(struct spi_mem *spimem) if (data && data->name) nor->mtd.name = data->name; if (!nor->mtd.name) nor->mtd.name = spi_mem_get_name(spimem); /* For some (historical?) reason many platforms provide two different * names in flash_platform_data: "name" and "type". Quite often name is * set to "m25p80" and then "type" provides a real chip name. Loading drivers/spi/Kconfig +13 −0 Original line number Diff line number Diff line Loading @@ -688,6 +688,19 @@ config SPI_TXX9 help SPI driver for Toshiba TXx9 MIPS SoCs config SPI_UNIPHIER tristate "Socionext UniPhier SPI Controller" depends on (ARCH_UNIPHIER || COMPILE_TEST) && OF help This enables a driver for the Socionext UniPhier SoC SCSSI SPI controller. UniPhier SoCs have SCSSI and MCSSI SPI controllers. Every UniPhier SoC has SCSSI which supports single channel. Older UniPhier Pro4/Pro5 also has MCSSI which support multiple channels. This driver supports SCSSI only. If your SoC supports SCSSI, say Y here. config SPI_XCOMM tristate "Analog Devices AD-FMCOMMS1-EBZ SPI-I2C-bridge driver" depends on I2C Loading Loading
Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.txt +4 −2 Original line number Diff line number Diff line Synopsys DesignWare AMBA 2.0 Synchronous Serial Interface. Required properties: - compatible : "snps,dw-apb-ssi" - reg : The register base for the controller. - compatible : "snps,dw-apb-ssi" or "mscc,<soc>-spi", where soc is "ocelot" or "jaguar2" - reg : The register base for the controller. For "mscc,<soc>-spi", a second register set is required (named ICPU_CFG:SPI_MST) - interrupts : One interrupt, used by the controller. - #address-cells : <1>, as required by generic SPI binding. - #size-cells : <0>, also as required by generic SPI binding. Loading
Documentation/devicetree/bindings/spi/spi-rockchip.txt +1 −0 Original line number Diff line number Diff line Loading @@ -7,6 +7,7 @@ Required Properties: - compatible: should be one of the following. "rockchip,rv1108-spi" for rv1108 SoCs. "rockchip,px30-spi", "rockchip,rk3066-spi" for px30 SoCs. "rockchip,rk3036-spi" for rk3036 SoCS. "rockchip,rk3066-spi" for rk3066 SoCs. "rockchip,rk3188-spi" for rk3188 SoCs. Loading
Documentation/devicetree/bindings/spi/spi-uniphier.txt 0 → 100644 +22 −0 Original line number Diff line number Diff line Socionext UniPhier SPI controller driver UniPhier SoCs have SCSSI which supports SPI single channel. Required properties: - compatible: should be "socionext,uniphier-scssi" - reg: address and length of the spi master registers - #address-cells: must be <1>, see spi-bus.txt - #size-cells: must be <0>, see spi-bus.txt - clocks: A phandle to the clock for the device. - resets: A phandle to the reset control for the device. Example: spi0: spi@54006000 { compatible = "socionext,uniphier-scssi"; reg = <0x54006000 0x100>; #address-cells = <1>; #size-cells = <0>; clocks = <&peri_clk 11>; resets = <&peri_rst 11>; };
drivers/mtd/devices/m25p80.c +3 −0 Original line number Diff line number Diff line Loading @@ -202,6 +202,9 @@ static int m25p_probe(struct spi_mem *spimem) if (data && data->name) nor->mtd.name = data->name; if (!nor->mtd.name) nor->mtd.name = spi_mem_get_name(spimem); /* For some (historical?) reason many platforms provide two different * names in flash_platform_data: "name" and "type". Quite often name is * set to "m25p80" and then "type" provides a real chip name. Loading
drivers/spi/Kconfig +13 −0 Original line number Diff line number Diff line Loading @@ -688,6 +688,19 @@ config SPI_TXX9 help SPI driver for Toshiba TXx9 MIPS SoCs config SPI_UNIPHIER tristate "Socionext UniPhier SPI Controller" depends on (ARCH_UNIPHIER || COMPILE_TEST) && OF help This enables a driver for the Socionext UniPhier SoC SCSSI SPI controller. UniPhier SoCs have SCSSI and MCSSI SPI controllers. Every UniPhier SoC has SCSSI which supports single channel. Older UniPhier Pro4/Pro5 also has MCSSI which support multiple channels. This driver supports SCSSI only. If your SoC supports SCSSI, say Y here. config SPI_XCOMM tristate "Analog Devices AD-FMCOMMS1-EBZ SPI-I2C-bridge driver" depends on I2C Loading
