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Commit c1554636 authored by Govind Singh's avatar Govind Singh Committed by Gerrit - the friendly Code Review server
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UPSTREAM: ath10k: Add hw param for rx ring size support 



WCN3990 uses larger ring size in comparison to existing
ring size value.
Add rx ring size hw param for supporting different rx ring
size across multiple target.

Signed-off-by: default avatarGovind Singh <govinds@qti.qualcomm.com>
Signed-off-by: default avatarKalle Valo <kvalo@qca.qualcomm.com>
Git-commit: bb8d0d15
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/ath.git


Change-Id: Id846a11c86467dabe2a14b0cd00aac9b364dab3b
Signed-off-by: default avatarDundi Raviteja <dundi@codeaurora.org>
parent 364f08b2

drivers/net/wireless/ath/ath10k/core.c

+13 −0
Original line number Diff line number Diff line
@@ -79,6 +79,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { 
		.ast_skid_limit = 0x10,

		.num_wds_entries = 0x20,

		.target_64bit = false,

		.rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,

	},

	{

		.id = QCA9887_HW_1_0_VERSION,
@@ -107,6 +108,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { 
		.ast_skid_limit = 0x10,

		.num_wds_entries = 0x20,

		.target_64bit = false,

		.rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,

	},

	{

		.id = QCA6174_HW_2_1_VERSION,
@@ -134,6 +136,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { 
		.ast_skid_limit = 0x10,

		.num_wds_entries = 0x20,

		.target_64bit = false,

		.rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,

	},

	{

		.id = QCA6174_HW_2_1_VERSION,
@@ -161,6 +164,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { 
		.ast_skid_limit = 0x10,

		.num_wds_entries = 0x20,

		.target_64bit = false,

		.rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,

	},

	{

		.id = QCA6174_HW_3_0_VERSION,
@@ -188,6 +192,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { 
		.ast_skid_limit = 0x10,

		.num_wds_entries = 0x20,

		.target_64bit = false,

		.rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,

	},

	{

		.id = QCA6174_HW_3_2_VERSION,
@@ -218,6 +223,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { 
		.ast_skid_limit = 0x10,

		.num_wds_entries = 0x20,

		.target_64bit = false,

		.rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,

	},

	{

		.id = QCA99X0_HW_2_0_DEV_VERSION,
@@ -251,6 +257,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { 
		.ast_skid_limit = 0x10,

		.num_wds_entries = 0x20,

		.target_64bit = false,

		.rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,

	},

	{

		.id = QCA9984_HW_1_0_DEV_VERSION,
@@ -289,6 +296,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { 
		.ast_skid_limit = 0x10,

		.num_wds_entries = 0x20,

		.target_64bit = false,

		.rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,

	},

	{

		.id = QCA9888_HW_2_0_DEV_VERSION,
@@ -326,6 +334,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { 
		.ast_skid_limit = 0x10,

		.num_wds_entries = 0x20,

		.target_64bit = false,

		.rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,

	},

	{

		.id = QCA9377_HW_1_0_DEV_VERSION,
@@ -353,6 +362,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { 
		.ast_skid_limit = 0x10,

		.num_wds_entries = 0x20,

		.target_64bit = false,

		.rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,

	},

	{

		.id = QCA9377_HW_1_1_DEV_VERSION,
@@ -382,6 +392,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { 
		.ast_skid_limit = 0x10,

		.num_wds_entries = 0x20,

		.target_64bit = false,

		.rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,

	},

	{

		.id = QCA4019_HW_1_0_DEV_VERSION,
@@ -416,6 +427,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { 
		.ast_skid_limit = 0x10,

		.num_wds_entries = 0x20,

		.target_64bit = false,

		.rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,

	},

	{

		.id = WCN3990_HW_1_0_DEV_VERSION,
@@ -435,6 +447,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { 
		.ast_skid_limit = TARGET_HL_10_TLV_AST_SKID_LIMIT,

		.num_wds_entries = TARGET_HL_10_TLV_NUM_WDS_ENTRIES,

		.target_64bit = true,

		.rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL_DUAL_MAC,

	},

};

drivers/net/wireless/ath/ath10k/htt.h

+3 −0
Original line number Diff line number Diff line
@@ -224,6 +224,9 @@ enum htt_rx_ring_flags { 


#define HTT_RX_RING_SIZE_MIN 128

#define HTT_RX_RING_SIZE_MAX 2048

#define HTT_RX_RING_SIZE HTT_RX_RING_SIZE_MAX

#define HTT_RX_RING_FILL_LEVEL (((HTT_RX_RING_SIZE) / 2) - 1)

#define HTT_RX_RING_FILL_LEVEL_DUAL_MAC (HTT_RX_RING_SIZE - 1)



struct htt_rx_ring_setup_ring32 {

	__le32 fw_idx_shadow_reg_paddr;

drivers/net/wireless/ath/ath10k/htt_rx.c

+1 −4
Original line number Diff line number Diff line
@@ -25,9 +25,6 @@ 


#include <linux/log2.h>



#define HTT_RX_RING_SIZE HTT_RX_RING_SIZE_MAX

#define HTT_RX_RING_FILL_LEVEL (((HTT_RX_RING_SIZE) / 2) - 1)



/* when under memory pressure rx ring refill may fail and needs a retry */

#define HTT_RX_RING_REFILL_RETRY_MS 50
@@ -525,7 +522,7 @@ int ath10k_htt_rx_alloc(struct ath10k_htt *htt) 
	 */

	htt->rx_ring.size = HTT_RX_RING_SIZE;

	htt->rx_ring.size_mask = htt->rx_ring.size - 1;

	htt->rx_ring.fill_level = HTT_RX_RING_FILL_LEVEL;

	htt->rx_ring.fill_level = ar->hw_params.rx_ring_fill_level;



	if (!is_power_of_2(htt->rx_ring.size)) {

		ath10k_warn(ar, "htt rx ring size is not power of 2\n");

drivers/net/wireless/ath/ath10k/hw.h

+3 −0
Original line number Diff line number Diff line
@@ -564,6 +564,9 @@ struct ath10k_hw_params { 


	/* Targets supporting physical addressing capability above 32-bits */

	bool target_64bit;



	/* Target rx ring fill level */

	u32 rx_ring_fill_level;

};



struct htt_rx_desc;