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Commit c05c1bf5 authored by Alexander Shiyan's avatar Alexander Shiyan Committed by Shawn Guo
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ARM: dts: imx27-phytec-phycore-som: Add initial support for PCM970 RDK 



Patch adds initial dts for Phytec PCM970 Rapid development kit.
- Added definition for UART0 and UART1.
- Added additional SPI chipselect which used on RDK for ZegBee module.

Signed-off-by: default avatarAlexander Shiyan <shc_work@mail.ru>
Acked-by: default avatarSascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: default avatarShawn Guo <shawn.guo@linaro.org>
parent b2dfe5ba

arch/arm/boot/dts/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -104,6 +104,7 @@ dtb-$(CONFIG_ARCH_MXC) += \ 
	imx27-apf27dev.dtb \

	imx27-pdk.dtb \

	imx27-phytec-phycore-som.dtb \

	imx27-phytec-phycore-rdk.dtb \

	imx31-bug.dtb \

	imx51-apf51.dtb \

	imx51-apf51dev.dtb \

arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts

0 → 100644
+29 −0
Original line number Diff line number Diff line 
/*

 * The code contained herein is licensed under the GNU General Public

 * License. You may obtain a copy of the GNU General Public License

 * Version 2 or later at the following locations:

 *

 * http://www.opensource.org/licenses/gpl-license.html

 * http://www.gnu.org/copyleft/gpl.html

 */



#include "imx27-phytec-phycore-som.dts"



/ {

	model = "Phytec pcm970";

	compatible = "phytec,imx27-pcm970", "phytec,imx27-pcm038", "fsl,imx27";

};



&cspi1 {

	fsl,spi-num-chipselects = <2>;

	cs-gpios = <&gpio4 28 0>, <&gpio4 27 0>;

};



&uart1 {

	fsl,uart-has-rtscts;

};



&uart2 {

	fsl,uart-has-rtscts;

	status = "okay";

};