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Commit c007026a authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
Browse files

Merge "ARM: dts: msm: Add thermal zone definition for ATOLL"

parents 6e58254f c8b2c22f

arch/arm64/boot/dts/qcom/atoll-regulator.dtsi

+15 −0
Original line number Diff line number Diff line
@@ -47,6 +47,13 @@ 
				<RPMH_REGULATOR_LEVEL_RETENTION>;

			qcom,min-dropout-voltage-level = <(-1)>;

		};



		cx_cdev: regulator-cdev {

			compatible = "qcom,rpmh-reg-cdev";

			mboxes = <&qmp_aop 0>;

			qcom,reg-resource-name = "cx";

			#cooling-cells = <2>;

		};

	};



	rpmh-regulator-gfxlvl {
@@ -96,6 +103,14 @@ 
			qcom,init-voltage-level =

				<RPMH_REGULATOR_LEVEL_RETENTION>;

		};



		mx_cdev: mx-cdev-lvl {

			compatible = "qcom,regulator-cooling-device";

			regulator-cdev-supply = <&VDD_MX_LEVEL>;

			regulator-levels = <RPMH_REGULATOR_LEVEL_NOM

					RPMH_REGULATOR_LEVEL_OFF>;

			#cooling-cells = <2>;

		};

	};



	rpmh-regulator-smpa1 {

arch/arm64/boot/dts/qcom/atoll-rumi.dtsi

+4 −0
Original line number Diff line number Diff line
@@ -134,6 +134,10 @@ 
	status = "ok";

};



&thermal_zones {

	/delete-node/ aoss-0-lowf;

};



&usb0 {

	dwc3@a600000 {

		usb-phy = <&usb_emu_phy>, <&usb_nop_phy>;

arch/arm64/boot/dts/qcom/atoll-thermal.dtsi

+353 −0
Original line number Diff line number Diff line
@@ -13,6 +13,28 @@ 


#include <dt-bindings/thermal/thermal.h>



&clock_cpucc {

	#address-cells = <1>;

	#size-cells = <1>;

	lmh_dcvs0: qcom,limits-dcvs@18358800 {

		compatible = "qcom,msm-hw-limits";

		interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;

		qcom,affinity = <0>;

		reg = <0x18358800 0x1000>,

			<0x18323000 0x1000>;

		#thermal-sensor-cells = <0>;

	};



	lmh_dcvs1: qcom,limits-dcvs@18350800 {

		compatible = "qcom,msm-hw-limits";

		interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;

		qcom,affinity = <1>;

		reg = <0x18350800 0x1000>,

			<0x18325800 0x1000>;

		#thermal-sensor-cells = <0>;

	};

};



&soc {

	qmi-tmd-devices {

		compatible = "qcom,qmi-cooling-devices";
@@ -671,4 +693,335 @@ 
			};

		};

	};



	gpuss-max-step {

		polling-delay-passive = <10>;

		polling-delay = <100>;

		thermal-governor = "step_wise";

		wake-capable-sensor;

		trips {

			gpu_trip: gpu-trip {

				temperature = <95000>;

				hysteresis = <0>;

				type = "passive";

			};

		};



		cooling-maps {

			gpu_cdev {

				trip = <&gpu_trip>;

				cooling-device = <&msm_gpu THERMAL_NO_LIMIT

							THERMAL_NO_LIMIT>;

			};

		};

	};



	cpu-0-max-step {

		polling-delay-passive = <0>;

		polling-delay = <0>;

		thermal-governor = "step_wise";

		wake-capable-sensor;

		trips {

			silver-trip {

				temperature = <120000>;

				hysteresis = <0>;

				type = "passive";

			};

		};

	};



	cpu-1-max-step {

		polling-delay-passive = <0>;

		polling-delay = <0>;

		thermal-governor = "step_wise";

		wake-capable-sensor;

		trips {

			gold-trip {

				temperature = <120000>;

				hysteresis = <0>;

				type = "passive";

			};

		};

	};



	cpu-0-0-step {

		polling-delay-passive = <0>;

		polling-delay = <0>;

		thermal-governor = "step_wise";

		thermal-sensors = <&tsens0 1>;

		wake-capable-sensor;

		trips {

			cpu0_config: cpu0-config {

				temperature = <110000>;

				hysteresis = <10000>;

				type = "passive";

			};

		};

		cooling-maps {

			cpu0_cdev {

				trip = <&cpu0_config>;

				cooling-device =

					<&CPU0 THERMAL_MAX_LIMIT

						THERMAL_MAX_LIMIT>;

			};

		};

	};



	cpu-0-1-step {

		polling-delay-passive = <0>;

		polling-delay = <0>;

		thermal-governor = "step_wise";

		thermal-sensors = <&tsens0 2>;

		wake-capable-sensor;

		trips {

			cpu1_config: cpu1-config {

				temperature = <110000>;

				hysteresis = <10000>;

				type = "passive";

			};

		};

		cooling-maps {

			cpu1_cdev {

				trip = <&cpu1_config>;

				cooling-device =

					<&CPU1 THERMAL_MAX_LIMIT

						THERMAL_MAX_LIMIT>;

			};

		};

	};



	cpu-0-2-step {

		polling-delay-passive = <0>;

		polling-delay = <0>;

		thermal-governor = "step_wise";

		thermal-sensors = <&tsens0 3>;

		wake-capable-sensor;

		trips {

			cpu2_config: cpu2-config {

				temperature = <110000>;

				hysteresis = <10000>;

				type = "passive";

			};

		};

		cooling-maps {

			cpu2_cdev {

				trip = <&cpu2_config>;

				cooling-device =

					<&CPU2 THERMAL_MAX_LIMIT

						THERMAL_MAX_LIMIT>;

			};

		};

	};



	cpu-0-3-step {

		polling-delay-passive = <0>;

		polling-delay = <0>;

		thermal-governor = "step_wise";

		thermal-sensors = <&tsens0 4>;

		wake-capable-sensor;

		trips {

			cpu3_config: cpu3-config {

				temperature = <110000>;

				hysteresis = <10000>;

				type = "passive";

			};

		};

		cooling-maps {

			cpu3_cdev {

				trip = <&cpu3_config>;

				cooling-device =

					<&CPU3 THERMAL_MAX_LIMIT

						THERMAL_MAX_LIMIT>;

			};

		};

	};



	cpu-0-4-step {

		polling-delay-passive = <0>;

		polling-delay = <0>;

		thermal-governor = "step_wise";

		thermal-sensors = <&tsens0 5>;

		wake-capable-sensor;

		trips {

			cpu4_config: cpu4-config {

				temperature = <110000>;

				hysteresis = <10000>;

				type = "passive";

			};

		};

		cooling-maps {

			cpu4_cdev {

				trip = <&cpu4_config>;

				cooling-device =

					<&CPU4 THERMAL_MAX_LIMIT

						THERMAL_MAX_LIMIT>;

			};

		};

	};



	cpu-0-5-step {

		polling-delay-passive = <0>;

		polling-delay = <0>;

		thermal-governor = "step_wise";

		thermal-sensors = <&tsens0 6>;

		wake-capable-sensor;

		trips {

			cpu5_config: cpu5-config {

				temperature = <110000>;

				hysteresis = <10000>;

				type = "passive";

			};

		};

		cooling-maps {

			cpu5_cdev {

				trip = <&cpu5_config>;

				cooling-device =

					<&CPU5 THERMAL_MAX_LIMIT

						THERMAL_MAX_LIMIT>;

			};

		};

	};



	cpu-1-0-step {

		polling-delay-passive = <0>;

		polling-delay = <0>;

		thermal-governor = "step_wise";

		thermal-sensors = <&tsens0 9>;

		wake-capable-sensor;

		trips {

			cpu6_0_config: cpu6-0-config {

				temperature = <110000>;

				hysteresis = <10000>;

				type = "passive";

			};

		};

		cooling-maps {

			cpu6_cdev {

				trip = <&cpu6_0_config>;

				cooling-device =

					<&CPU6 THERMAL_MAX_LIMIT

						THERMAL_MAX_LIMIT>;

			};

		};

	};



	cpu-1-1-step {

		polling-delay-passive = <0>;

		polling-delay = <0>;

		thermal-governor = "step_wise";

		thermal-sensors = <&tsens0 10>;

		wake-capable-sensor;

		trips {

			cpu6_1_config: cpu6-1-config {

				temperature = <110000>;

				hysteresis = <10000>;

				type = "passive";

			};

		};

		cooling-maps {

			cpu6_cdev {

				trip = <&cpu6_1_config>;

				cooling-device =

					<&CPU6 THERMAL_MAX_LIMIT

						THERMAL_MAX_LIMIT>;

			};

		};

	};



	cpu-1-2-step {

		polling-delay-passive = <0>;

		polling-delay = <0>;

		thermal-governor = "step_wise";

		thermal-sensors = <&tsens0 11>;

		wake-capable-sensor;

		trips {

			cpu7_0_config: cpu7-0-config {

				temperature = <110000>;

				hysteresis = <10000>;

				type = "passive";

			};

		};

		cooling-maps {

			cpu7_cdev {

				trip = <&cpu7_0_config>;

				cooling-device =

					<&CPU7 THERMAL_MAX_LIMIT

						THERMAL_MAX_LIMIT>;

			};

		};

	};



	cpu-1-3-step {

		polling-delay-passive = <0>;

		polling-delay = <0>;

		thermal-governor = "step_wise";

		thermal-sensors = <&tsens0 12>;

		wake-capable-sensor;

		trips {

			cpu7_1_config: cpu7-1-config {

				temperature = <110000>;

				hysteresis = <10000>;

				type = "passive";

			};

		};

		cooling-maps {

			cpu7_cdev {

				trip = <&cpu7_1_config>;

				cooling-device =

					<&CPU7 THERMAL_MAX_LIMIT

						THERMAL_MAX_LIMIT>;

			};

		};

	};



	aoss-0-lowf {

		polling-delay-passive = <0>;

		polling-delay = <0>;

		thermal-governor = "low_limits_floor";

		thermal-sensors = <&tsens0 0>;

		wake-capable-sensor;

		tracks-low;

		trips {

			aoss0_trip: aoss0-trip {

				temperature = <5000>;

				hysteresis = <5000>;

				type = "passive";

			};

		};

		cooling-maps {

			cpu0_cdev {

				trip = <&aoss0_trip>;

				cooling-device = <&CPU0 2 2>;

			};

			cpu1_cdev {

				trip = <&aoss0_trip>;

				cooling-device = <&CPU6 4 4>;

			};

			gpu_vdd_cdev {

				trip = <&aoss0_trip>;

				cooling-device = <&msm_gpu (THERMAL_MAX_LIMIT-3)

							(THERMAL_MAX_LIMIT-3)>;

			};

			cx_vdd_cdev {

				trip = <&aoss0_trip>;

				cooling-device = <&cx_cdev 0 0>;

			};

			mx_vdd_cdev {

				trip = <&aoss0_trip>;

				cooling-device = <&mx_cdev 0 0>;

			};

			modem_vdd_cdev {

				trip = <&aoss0_trip>;

				cooling-device = <&modem_vdd 0 0>;

			};

			adsp_vdd_cdev {

				trip = <&aoss0_trip>;

				cooling-device = <&adsp_vdd 0 0>;

			};

			cdsp_vdd_cdev {

				trip = <&aoss0_trip>;

				cooling-device = <&cdsp_vdd 0 0>;

			};

		};

	};

};

arch/arm64/boot/dts/qcom/atoll.dtsi

+16 −0
Original line number Diff line number Diff line
@@ -52,6 +52,8 @@ 
			d-cache-size = <0x8000>;

			i-cache-size = <0x8000>;

			next-level-cache = <&L2_0>;

			qcom,lmh-dcvs = <&lmh_dcvs0>;

			#cooling-cells = <2>;

			L2_0: l2-cache {

			      compatible = "arm,arch-cache";

			      cache-size = <0x10000>;
@@ -90,6 +92,8 @@ 
			d-cache-size = <0x8000>;

			i-cache-size = <0x8000>;

			next-level-cache = <&L2_100>;

			qcom,lmh-dcvs = <&lmh_dcvs0>;

			#cooling-cells = <2>;

			L2_100: l2-cache {

			      compatible = "arm,arch-cache";

			      cache-size = <0x10000>;
@@ -123,6 +127,8 @@ 
			d-cache-size = <0x8000>;

			i-cache-size = <0x8000>;

			next-level-cache = <&L2_200>;

			qcom,lmh-dcvs = <&lmh_dcvs0>;

			#cooling-cells = <2>;

			L2_200: l2-cache {

			      compatible = "arm,arch-cache";

			      cache-size = <0x10000>;
@@ -155,6 +161,8 @@ 
			d-cache-size = <0x8000>;

			i-cache-size = <0x8000>;

			next-level-cache = <&L2_300>;

			qcom,lmh-dcvs = <&lmh_dcvs0>;

			#cooling-cells = <2>;

			L2_300: l2-cache {

			      compatible = "arm,arch-cache";

			      cache-size = <0x10000>;
@@ -187,6 +195,8 @@ 
			d-cache-size = <0x8000>;

			i-cache-size = <0x8000>;

			next-level-cache = <&L2_400>;

			qcom,lmh-dcvs = <&lmh_dcvs0>;

			#cooling-cells = <2>;

			L2_400: l2-cache {

			      compatible = "arm,arch-cache";

			      cache-size = <0x10000>;
@@ -219,6 +229,8 @@ 
			d-cache-size = <0x8000>;

			i-cache-size = <0x8000>;

			next-level-cache = <&L2_500>;

			qcom,lmh-dcvs = <&lmh_dcvs0>;

			#cooling-cells = <2>;

			L2_500: l2-cache {

			      compatible = "arm,arch-cache";

			      cache-size = <0x10000>;
@@ -251,6 +263,8 @@ 
			d-cache-size = <0x10000>;

			i-cache-size = <0x10000>;

			next-level-cache = <&L2_600>;

			qcom,lmh-dcvs = <&lmh_dcvs1>;

			#cooling-cells = <2>;

			L2_600: l2-cache {

			      compatible = "arm,arch-cache";

			      cache-size = <0x40000>;
@@ -292,6 +306,8 @@ 
			d-cache-size = <0x10000>;

			i-cache-size = <0x10000>;

			next-level-cache = <&L2_700>;

			qcom,lmh-dcvs = <&lmh_dcvs1>;

			#cooling-cells = <2>;

			L2_700: l2-cache {

			      compatible = "arm,arch-cache";

			      cache-size = <0x40000>;