pinctrl: Add wakeup GPIO register and bit information for Bengal (bf4326c7) · Commits · e / devices / android_kernel_xiaomi_nabu

drivers/pinctrl/qcom/pinctrl-bengal.c

+162 −136

Original line number	Original line	Diff line number	Diff line
	// SPDX-License-Identifier: GPL-2.0-only		// SPDX-License-Identifier: GPL-2.0-only
	/*		/*
	* Copyright (c) 2019, The Linux Foundation. All rights reserved.		* Copyright (c) 2019, The Linux Foundation. All rights reserved.
	*
	* This program is free software; you can redistribute it and/or modify
	* it under the terms of the GNU General Public License version 2 and
	* only version 2 as published by the Free Software Foundation.
	*
	* This program is distributed in the hope that it will be useful,
	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	* GNU General Public License for more details.
	*/		*/

	#include <linux/module.h>		#include <linux/module.h>
	@@ -32,7 +23,7 @@
	#define EAST 0x00900000		#define EAST 0x00900000
	#define DUMMY 0x0		#define DUMMY 0x0
	#define REG_SIZE 0x1000		#define REG_SIZE 0x1000
	#define PINGROUP(id, base, f1, f2, f3, f4, f5, f6, f7, f8, f9) \		#define PINGROUP(id, base, f1, f2, f3, f4, f5, f6, f7, f8, f9, wake_off, bit) \
	{ \		{ \
	.name = "gpio" #id, \		.name = "gpio" #id, \
	.pins = gpio##id##_pins, \		.pins = gpio##id##_pins, \
	@@ -71,6 +62,8 @@
	.intr_polarity_bit = 1, \		.intr_polarity_bit = 1, \
	.intr_detection_bit = 2, \		.intr_detection_bit = 2, \
	.intr_detection_width = 2, \		.intr_detection_width = 2, \
			.wake_reg = base + wake_off, \
			.wake_bit = bit, \
	}		}

	#define SDC_QDSD_PINGROUP(pg_name, ctl, pull, drv) \		#define SDC_QDSD_PINGROUP(pg_name, ctl, pull, drv) \
	@@ -372,14 +365,14 @@ static const unsigned int sdc2_data_pins[] = { 119 };
	static const unsigned int ufs_reset_pins[] = { 120 };		static const unsigned int ufs_reset_pins[] = { 120 };

	enum bengal_functions {		enum bengal_functions {
	msm_mux_ddr_bist,
	msm_mux_m_voc,
	msm_mux_gpio,
	msm_mux_qup0,		msm_mux_qup0,
			msm_mux_gpio,
			msm_mux_ddr_bist,
	msm_mux_phase_flag0,		msm_mux_phase_flag0,
	msm_mux_qdss_gpio8,		msm_mux_qdss_gpio8,
	msm_mux_atest_tsens,		msm_mux_atest_tsens,
	msm_mux_mpm_pwr,		msm_mux_mpm_pwr,
			msm_mux_m_voc,
	msm_mux_phase_flag1,		msm_mux_phase_flag1,
	msm_mux_qdss_gpio9,		msm_mux_qdss_gpio9,
	msm_mux_atest_tsens2,		msm_mux_atest_tsens2,
	@@ -555,11 +548,8 @@ enum bengal_functions {
	msm_mux_NA,		msm_mux_NA,
	};		};

	static const char * const ddr_bist_groups[] = {		static const char * const qup0_groups[] = {
	"gpio0", "gpio1", "gpio2", "gpio3",		"gpio0", "gpio1", "gpio2", "gpio3", "gpio82", "gpio86",
	};
	static const char * const m_voc_groups[] = {
	"gpio0",
	};		};
	static const char * const gpio_groups[] = {		static const char * const gpio_groups[] = {
	"gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7",		"gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7",
	@@ -580,8 +570,8 @@ static const char * const gpio_groups[] = {
	"gpio105", "gpio106", "gpio107", "gpio108", "gpio109", "gpio110",		"gpio105", "gpio106", "gpio107", "gpio108", "gpio109", "gpio110",
	"gpio111", "gpio112",		"gpio111", "gpio112",
	};		};
	static const char * const qup0_groups[] = {		static const char * const ddr_bist_groups[] = {
	"gpio0", "gpio1", "gpio2", "gpio3", "gpio82", "gpio86",		"gpio0", "gpio1", "gpio2", "gpio3",
	};		};
	static const char * const phase_flag0_groups[] = {		static const char * const phase_flag0_groups[] = {
	"gpio0",		"gpio0",
	@@ -595,6 +585,9 @@ static const char * const atest_tsens_groups[] = {
	static const char * const mpm_pwr_groups[] = {		static const char * const mpm_pwr_groups[] = {
	"gpio1",		"gpio1",
	};		};
			static const char * const m_voc_groups[] = {
			"gpio0",
			};
	static const char * const phase_flag1_groups[] = {		static const char * const phase_flag1_groups[] = {
	"gpio1",		"gpio1",
	};		};
	@@ -1114,14 +1107,14 @@ static const char * const dac_calib25_groups[] = {
	};		};

	static const struct msm_function bengal_functions[] = {		static const struct msm_function bengal_functions[] = {
	FUNCTION(ddr_bist),
	FUNCTION(m_voc),
	FUNCTION(gpio),
	FUNCTION(qup0),		FUNCTION(qup0),
			FUNCTION(gpio),
			FUNCTION(ddr_bist),
	FUNCTION(phase_flag0),		FUNCTION(phase_flag0),
	FUNCTION(qdss_gpio8),		FUNCTION(qdss_gpio8),
	FUNCTION(atest_tsens),		FUNCTION(atest_tsens),
	FUNCTION(mpm_pwr),		FUNCTION(mpm_pwr),
			FUNCTION(m_voc),
	FUNCTION(phase_flag1),		FUNCTION(phase_flag1),
	FUNCTION(qdss_gpio9),		FUNCTION(qdss_gpio9),
	FUNCTION(atest_tsens2),		FUNCTION(atest_tsens2),
	@@ -1303,182 +1296,215 @@ static const struct msm_function bengal_functions[] = {
	*/		*/
	static const struct msm_pingroup bengal_groups[] = {		static const struct msm_pingroup bengal_groups[] = {
	[0] = PINGROUP(0, WEST, qup0, m_voc, ddr_bist, NA, phase_flag0,		[0] = PINGROUP(0, WEST, qup0, m_voc, ddr_bist, NA, phase_flag0,
	qdss_gpio8, atest_tsens, NA, NA),		qdss_gpio8, atest_tsens, NA, NA, 0x71000, 1),
	[1] = PINGROUP(1, WEST, qup0, mpm_pwr, ddr_bist, NA, phase_flag1,		[1] = PINGROUP(1, WEST, qup0, mpm_pwr, ddr_bist, NA, phase_flag1,
	qdss_gpio9, atest_tsens2, NA, NA),		qdss_gpio9, atest_tsens2, NA, NA, 0, -1),
	[2] = PINGROUP(2, WEST, qup0, ddr_bist, NA, phase_flag2, qdss_gpio10,		[2] = PINGROUP(2, WEST, qup0, ddr_bist, NA, phase_flag2, qdss_gpio10,
	dac_calib0, atest_usb10, NA, NA),		dac_calib0, atest_usb10, NA, NA, 0, -1),
	[3] = PINGROUP(3, WEST, qup0, ddr_bist, NA, phase_flag3, qdss_gpio11,		[3] = PINGROUP(3, WEST, qup0, ddr_bist, NA, phase_flag3, qdss_gpio11,
	dac_calib1, atest_usb11, NA, NA),		dac_calib1, atest_usb11, NA, NA, 0x71000, 2),
	[4] = PINGROUP(4, WEST, qup1, CRI_TRNG0, NA, phase_flag4, dac_calib2,		[4] = PINGROUP(4, WEST, qup1, CRI_TRNG0, NA, phase_flag4, dac_calib2,
	atest_usb12, NA, NA, NA),		atest_usb12, NA, NA, NA, 0x71000, 3),
	[5] = PINGROUP(5, WEST, qup1, CRI_TRNG1, NA, phase_flag5, dac_calib3,		[5] = PINGROUP(5, WEST, qup1, CRI_TRNG1, NA, phase_flag5, dac_calib3,
	atest_usb13, NA, NA, NA),		atest_usb13, NA, NA, NA, 0, -1),
	[6] = PINGROUP(6, WEST, qup2, NA, phase_flag6, dac_calib4, atest_usb1,		[6] = PINGROUP(6, WEST, qup2, NA, phase_flag6, dac_calib4, atest_usb1,
	NA, NA, NA, NA),		NA, NA, NA, NA, 0x71000, 4),
	[7] = PINGROUP(7, WEST, qup2, NA, NA, NA, NA, NA, NA, NA, NA),		[7] = PINGROUP(7, WEST, qup2, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1),
	[8] = PINGROUP(8, EAST, qup3, pbs_out, PLL_BIST, NA, qdss_gpio, NA,		[8] = PINGROUP(8, EAST, qup3, pbs_out, PLL_BIST, NA, qdss_gpio, NA,
	tsense_pwm, NA, NA),		tsense_pwm, NA, NA, 0x71000, 0),
	[9] = PINGROUP(9, EAST, qup3, pbs_out, PLL_BIST, NA, qdss_gpio, NA, NA,		[9] = PINGROUP(9, EAST, qup3, pbs_out, PLL_BIST, NA, qdss_gpio, NA, NA,
	NA, NA),		NA, NA, 0, -1),
	[10] = PINGROUP(10, EAST, qup3, AGERA_PLL, NA, pbs0, qdss_gpio0, NA,		[10] = PINGROUP(10, EAST, qup3, AGERA_PLL, NA, pbs0, qdss_gpio0, NA,
	NA, NA, NA),		NA, NA, NA, 0, -1),
	[11] = PINGROUP(11, EAST, qup3, AGERA_PLL, NA, pbs1, qdss_gpio1, NA,		[11] = PINGROUP(11, EAST, qup3, AGERA_PLL, NA, pbs1, qdss_gpio1, NA,
	NA, NA, NA),		NA, NA, NA, 0x71000, 1),
	[12] = PINGROUP(12, WEST, qup4, tgu_ch0, NA, NA, NA, NA, NA, NA, NA),		[12] = PINGROUP(12, WEST, qup4, tgu_ch0, NA, NA, NA, NA, NA, NA, NA,
	[13] = PINGROUP(13, WEST, qup4, tgu_ch1, NA, NA, NA, NA, NA, NA, NA),		0, -1),
			[13] = PINGROUP(13, WEST, qup4, tgu_ch1, NA, NA, NA, NA, NA, NA, NA,
			0x71000, 5),
	[14] = PINGROUP(14, WEST, qup5, tgu_ch2, NA, phase_flag7, qdss_gpio4,		[14] = PINGROUP(14, WEST, qup5, tgu_ch2, NA, phase_flag7, qdss_gpio4,
	dac_calib5, NA, NA, NA),		dac_calib5, NA, NA, NA, 0x71000, 6),
	[15] = PINGROUP(15, WEST, qup5, tgu_ch3, NA, phase_flag8, qdss_gpio5,		[15] = PINGROUP(15, WEST, qup5, tgu_ch3, NA, phase_flag8, qdss_gpio5,
	dac_calib6, NA, NA, NA),		dac_calib6, NA, NA, NA, 0, -1),
	[16] = PINGROUP(16, WEST, qup5, NA, phase_flag9, qdss_gpio6,		[16] = PINGROUP(16, WEST, qup5, NA, phase_flag9, qdss_gpio6,
	dac_calib7, NA, NA, NA, NA),		dac_calib7, NA, NA, NA, NA, 0, -1),
	[17] = PINGROUP(17, WEST, qup5, NA, phase_flag10, qdss_gpio7,		[17] = PINGROUP(17, WEST, qup5, NA, phase_flag10, qdss_gpio7,
	dac_calib8, NA, NA, NA, NA),		dac_calib8, NA, NA, NA, NA, 0x71000, 7),
	[18] = PINGROUP(18, EAST, SDC2_TB, CRI_TRNG, pbs2, qdss_gpio2, NA, NA,		[18] = PINGROUP(18, EAST, SDC2_TB, CRI_TRNG, pbs2, qdss_gpio2, NA, NA,
	NA, NA, NA),		NA, NA, NA, 0x71000, 2),
	[19] = PINGROUP(19, EAST, SDC1_TB, pbs3, qdss_gpio3, NA, NA, NA, NA,		[19] = PINGROUP(19, EAST, SDC1_TB, pbs3, qdss_gpio3, NA, NA, NA, NA,
	NA, NA),		NA, NA, 0x71000, 3),
	[20] = PINGROUP(20, EAST, cam_mclk, pbs4, qdss_gpio4, NA, NA, NA, NA,		[20] = PINGROUP(20, EAST, cam_mclk, pbs4, qdss_gpio4, NA, NA, NA, NA,
	NA, NA),		NA, NA, 0, -1),
	[21] = PINGROUP(21, EAST, cam_mclk, adsp_ext, pbs5, qdss_gpio5, NA, NA,		[21] = PINGROUP(21, EAST, cam_mclk, adsp_ext, pbs5, qdss_gpio5, NA, NA,
	NA, NA, NA),		NA, NA, NA, 0, -1),
	[22] = PINGROUP(22, EAST, cci_i2c, prng_rosc, NA, pbs6, phase_flag11,		[22] = PINGROUP(22, EAST, cci_i2c, prng_rosc, NA, pbs6, phase_flag11,
	qdss_gpio6, dac_calib9, atest_usb20, NA),		qdss_gpio6, dac_calib9, atest_usb20, NA, 0, -1),
	[23] = PINGROUP(23, EAST, cci_i2c, prng_rosc, NA, pbs7, phase_flag12,		[23] = PINGROUP(23, EAST, cci_i2c, prng_rosc, NA, pbs7, phase_flag12,
	qdss_gpio7, dac_calib10, atest_usb21, NA),		qdss_gpio7, dac_calib10, atest_usb21, NA, 0, -1),
	[24] = PINGROUP(24, EAST, CCI_TIMER1, GCC_GP1, NA, pbs8, phase_flag13,		[24] = PINGROUP(24, EAST, CCI_TIMER1, GCC_GP1, NA, pbs8, phase_flag13,
	qdss_gpio8, dac_calib11, atest_usb22, NA),		qdss_gpio8, dac_calib11, atest_usb22, NA, 0x71000, 4),
	[25] = PINGROUP(25, EAST, cci_async, CCI_TIMER0, NA, pbs9,		[25] = PINGROUP(25, EAST, cci_async, CCI_TIMER0, NA, pbs9,
	phase_flag14, qdss_gpio9, dac_calib12, atest_usb23, NA),		phase_flag14, qdss_gpio9, dac_calib12, atest_usb23, NA,
			0x71000, 5),
	[26] = PINGROUP(26, EAST, NA, pbs10, phase_flag15, qdss_gpio10,		[26] = PINGROUP(26, EAST, NA, pbs10, phase_flag15, qdss_gpio10,
	dac_calib13, atest_usb2, vsense_trigger, NA, NA),		dac_calib13, atest_usb2, vsense_trigger, NA, NA, 0, -1),
	[27] = PINGROUP(27, EAST, cam_mclk, qdss_cti, NA, NA, NA, NA, NA, NA,		[27] = PINGROUP(27, EAST, cam_mclk, qdss_cti, NA, NA, NA, NA, NA, NA,
	NA),		NA, 0x71000, 6),
	[28] = PINGROUP(28, EAST, cam_mclk, CCI_TIMER2, qdss_cti, NA, NA, NA,		[28] = PINGROUP(28, EAST, cam_mclk, CCI_TIMER2, qdss_cti, NA, NA, NA,
	NA, NA, NA),		NA, NA, NA, 0x71000, 7),
	[29] = PINGROUP(29, EAST, cci_i2c, NA, phase_flag16, dac_calib14,		[29] = PINGROUP(29, EAST, cci_i2c, NA, phase_flag16, dac_calib14,
	atest_char, NA, NA, NA, NA),		atest_char, NA, NA, NA, NA, 0, -1),
	[30] = PINGROUP(30, EAST, cci_i2c, NA, phase_flag17, dac_calib15,		[30] = PINGROUP(30, EAST, cci_i2c, NA, phase_flag17, dac_calib15,
	atest_char0, NA, NA, NA, NA),		atest_char0, NA, NA, NA, NA, 0, -1),
	[31] = PINGROUP(31, EAST, GP_PDM0, NA, phase_flag18, dac_calib16,		[31] = PINGROUP(31, EAST, GP_PDM0, NA, phase_flag18, dac_calib16,
	atest_char1, NA, NA, NA, NA),		atest_char1, NA, NA, NA, NA, 0x71000, 8),
	[32] = PINGROUP(32, EAST, CCI_TIMER3, GP_PDM1, NA, phase_flag19,		[32] = PINGROUP(32, EAST, CCI_TIMER3, GP_PDM1, NA, phase_flag19,
	dac_calib17, atest_char2, NA, NA, NA),		dac_calib17, atest_char2, NA, NA, NA, 0x71000, 9),
	[33] = PINGROUP(33, EAST, GP_PDM2, NA, phase_flag20, dac_calib18,		[33] = PINGROUP(33, EAST, GP_PDM2, NA, phase_flag20, dac_calib18,
	atest_char3, NA, NA, NA, NA),		atest_char3, NA, NA, NA, NA, 0x71000, 10),
	[34] = PINGROUP(34, EAST, NA, NA, NA, NA, NA, NA, NA, NA, NA),		[34] = PINGROUP(34, EAST, NA, NA, NA, NA, NA, NA, NA, NA, NA,
	[35] = PINGROUP(35, EAST, NA, phase_flag21, NA, NA, NA, NA, NA, NA, NA),		0x71000, 11),
	[36] = PINGROUP(36, EAST, NA, phase_flag22, NA, NA, NA, NA, NA, NA, NA),		[35] = PINGROUP(35, EAST, NA, phase_flag21, NA, NA, NA, NA, NA, NA, NA,
	[37] = PINGROUP(37, EAST, NA, NA, NA, NA, NA, NA, NA, NA, NA),		0x71000, 12),
	[38] = PINGROUP(38, EAST, NA, NA, NA, NA, NA, NA, NA, NA, NA),		[36] = PINGROUP(36, EAST, NA, phase_flag22, NA, NA, NA, NA, NA, NA, NA,
	[39] = PINGROUP(39, EAST, NA, NA, NA, NA, NA, NA, NA, NA, NA),		0x71000, 13),
	[40] = PINGROUP(40, EAST, NA, NA, NA, NA, NA, NA, NA, NA, NA),		[37] = PINGROUP(37, EAST, NA, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1),
	[41] = PINGROUP(41, EAST, NA, NA, NA, NA, NA, NA, NA, NA, NA),		[38] = PINGROUP(38, EAST, NA, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1),
	[42] = PINGROUP(42, EAST, NA, NAV_GPIO, NA, NA, NA, NA, NA, NA, NA),		[39] = PINGROUP(39, EAST, NA, NA, NA, NA, NA, NA, NA, NA, NA,
	[43] = PINGROUP(43, EAST, NA, NA, phase_flag23, NA, NA, NA, NA, NA, NA),		0x71000, 14),
	[44] = PINGROUP(44, EAST, NA, NA, phase_flag24, NA, NA, NA, NA, NA, NA),		[40] = PINGROUP(40, EAST, NA, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1),
	[45] = PINGROUP(45, EAST, NA, NA, phase_flag25, NA, NA, NA, NA, NA, NA),		[41] = PINGROUP(41, EAST, NA, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1),
	[46] = PINGROUP(46, EAST, NA, NA, NA, NA, NA, NA, NA, NA, NA),		[42] = PINGROUP(42, EAST, NA, NAV_GPIO, NA, NA, NA, NA, NA, NA, NA,
			0, -1),
			[43] = PINGROUP(43, EAST, NA, NA, phase_flag23, NA, NA, NA, NA, NA, NA,
			0, -1),
			[44] = PINGROUP(44, EAST, NA, NA, phase_flag24, NA, NA, NA, NA, NA, NA,
			0, -1),
			[45] = PINGROUP(45, EAST, NA, NA, phase_flag25, NA, NA, NA, NA, NA, NA,
			0, -1),
			[46] = PINGROUP(46, EAST, NA, NA, NA, NA, NA, NA, NA, NA, NA,
			0x71000, 15),
	[47] = PINGROUP(47, EAST, NA, NAV_GPIO, pbs14, qdss_gpio14, NA, NA, NA,		[47] = PINGROUP(47, EAST, NA, NAV_GPIO, pbs14, qdss_gpio14, NA, NA, NA,
	NA, NA),		NA, NA, 0, -1),
	[48] = PINGROUP(48, EAST, NA, vfr_1, NA, pbs15, qdss_gpio15, NA, NA,		[48] = PINGROUP(48, EAST, NA, vfr_1, NA, pbs15, qdss_gpio15, NA, NA,
	NA, NA),		NA, NA, 0, -1),
	[49] = PINGROUP(49, EAST, NA, PA_INDICATOR, NA, NA, NA, NA, NA, NA, NA),		[49] = PINGROUP(49, EAST, NA, PA_INDICATOR, NA, NA, NA, NA, NA, NA, NA,
	[50] = PINGROUP(50, EAST, NA, NA, NA, NA, NA, NA, NA, NA, NA),		0, -1),
	[51] = PINGROUP(51, EAST, NA, NA, NA, NA, NA, NA, NA, NA, NA),		[50] = PINGROUP(50, EAST, NA, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1),
			[51] = PINGROUP(51, EAST, NA, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1),
	[52] = PINGROUP(52, EAST, NA, NAV_GPIO, pbs_out, NA, NA, NA, NA, NA,		[52] = PINGROUP(52, EAST, NA, NAV_GPIO, pbs_out, NA, NA, NA, NA, NA,
	NA),		NA, 0, -1),
	[53] = PINGROUP(53, EAST, NA, gsm1_tx, NA, NA, NA, NA, NA, NA, NA),		[53] = PINGROUP(53, EAST, NA, gsm1_tx, NA, NA, NA, NA, NA, NA, NA,
	[54] = PINGROUP(54, EAST, NA, NA, NA, NA, NA, NA, NA, NA, NA),		0, -1),
	[55] = PINGROUP(55, EAST, NA, NA, NA, NA, NA, NA, NA, NA, NA),		[54] = PINGROUP(54, EAST, NA, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1),
	[56] = PINGROUP(56, EAST, NA, NA, NA, NA, NA, NA, NA, NA, NA),		[55] = PINGROUP(55, EAST, NA, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1),
	[57] = PINGROUP(57, EAST, NA, NA, NA, NA, NA, NA, NA, NA, NA),		[56] = PINGROUP(56, EAST, NA, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1),
	[58] = PINGROUP(58, EAST, NA, NA, NA, NA, NA, NA, NA, NA, NA),		[57] = PINGROUP(57, EAST, NA, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1),
	[59] = PINGROUP(59, EAST, NA, SSBI_WTR1, NA, NA, NA, NA, NA, NA, NA),		[58] = PINGROUP(58, EAST, NA, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1),
	[60] = PINGROUP(60, EAST, NA, SSBI_WTR1, NA, NA, NA, NA, NA, NA, NA),		[59] = PINGROUP(59, EAST, NA, SSBI_WTR1, NA, NA, NA, NA, NA, NA, NA,
	[61] = PINGROUP(61, EAST, NA, NA, NA, NA, NA, NA, NA, NA, NA),		0, -1),
	[62] = PINGROUP(62, EAST, NA, pll_bypassnl, NA, NA, NA, NA, NA, NA, NA),		[60] = PINGROUP(60, EAST, NA, SSBI_WTR1, NA, NA, NA, NA, NA, NA, NA,
			0, -1),
			[61] = PINGROUP(61, EAST, NA, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1),
			[62] = PINGROUP(62, EAST, NA, pll_bypassnl, NA, NA, NA, NA, NA, NA, NA,
			0x71000, 16),
	[63] = PINGROUP(63, EAST, pll_reset, NA, phase_flag26, ddr_pxi0, NA,		[63] = PINGROUP(63, EAST, pll_reset, NA, phase_flag26, ddr_pxi0, NA,
	NA, NA, NA, NA),		NA, NA, NA, NA, 0x71000, 17),
	[64] = PINGROUP(64, EAST, gsm0_tx, NA, phase_flag27, ddr_pxi0, NA, NA,		[64] = PINGROUP(64, EAST, gsm0_tx, NA, phase_flag27, ddr_pxi0, NA, NA,
	NA, NA, NA),		NA, NA, NA, 0x71000, 18),
	[65] = PINGROUP(65, WEST, NA, NA, NA, NA, NA, NA, NA, NA, NA),		[65] = PINGROUP(65, WEST, NA, NA, NA, NA, NA, NA, NA, NA, NA,
	[66] = PINGROUP(66, WEST, NA, NA, NA, NA, NA, NA, NA, NA, NA),		0x71000, 8),
	[67] = PINGROUP(67, WEST, NA, NA, NA, NA, NA, NA, NA, NA, NA),		[66] = PINGROUP(66, WEST, NA, NA, NA, NA, NA, NA, NA, NA, NA,
	[68] = PINGROUP(68, WEST, NA, NA, NA, NA, NA, NA, NA, NA, NA),		0x71000, 9),
			[67] = PINGROUP(67, WEST, NA, NA, NA, NA, NA, NA, NA, NA, NA,
			0x71000, 10),
			[68] = PINGROUP(68, WEST, NA, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1),
	[69] = PINGROUP(69, WEST, qup1, GCC_GP2, qdss_gpio12, ddr_pxi1, NA, NA,		[69] = PINGROUP(69, WEST, qup1, GCC_GP2, qdss_gpio12, ddr_pxi1, NA, NA,
	NA, NA, NA),		NA, NA, NA, 0x71000, 11),
	[70] = PINGROUP(70, WEST, qup1, GCC_GP3, qdss_gpio13, ddr_pxi1, NA, NA,		[70] = PINGROUP(70, WEST, qup1, GCC_GP3, qdss_gpio13, ddr_pxi1, NA, NA,
	NA, NA, NA),		NA, NA, NA, 0x71000, 12),
	[71] = PINGROUP(71, WEST, qup2, dbg_out, NA, NA, NA, NA, NA, NA, NA),		[71] = PINGROUP(71, WEST, qup2, dbg_out, NA, NA, NA, NA, NA, NA, NA,
			0, -1),
	[72] = PINGROUP(72, SOUTH, uim2_data, qdss_cti, NA, NA, NA, NA, NA, NA,		[72] = PINGROUP(72, SOUTH, uim2_data, qdss_cti, NA, NA, NA, NA, NA, NA,
	NA),		NA, 0x71000, 3),
	[73] = PINGROUP(73, SOUTH, uim2_clk, NA, qdss_cti, NA, NA, NA, NA, NA,		[73] = PINGROUP(73, SOUTH, uim2_clk, NA, qdss_cti, NA, NA, NA, NA, NA,
	NA),		NA, 0, -1),
	[74] = PINGROUP(74, SOUTH, uim2_reset, NA, NA, NA, NA, NA, NA, NA, NA),		[74] = PINGROUP(74, SOUTH, uim2_reset, NA, NA, NA, NA, NA, NA, NA, NA,
			0, -1),
	[75] = PINGROUP(75, SOUTH, uim2_present, NA, NA, NA, NA, NA, NA, NA,		[75] = PINGROUP(75, SOUTH, uim2_present, NA, NA, NA, NA, NA, NA, NA,
	NA),		NA, 0x71000, 4),
	[76] = PINGROUP(76, SOUTH, uim1_data, NA, NA, NA, NA, NA, NA, NA, NA),		[76] = PINGROUP(76, SOUTH, uim1_data, NA, NA, NA, NA, NA, NA, NA, NA,
	[77] = PINGROUP(77, SOUTH, uim1_clk, NA, NA, NA, NA, NA, NA, NA, NA),		0, -1),
	[78] = PINGROUP(78, SOUTH, uim1_reset, NA, NA, NA, NA, NA, NA, NA, NA),		[77] = PINGROUP(77, SOUTH, uim1_clk, NA, NA, NA, NA, NA, NA, NA, NA,
			0, -1),
			[78] = PINGROUP(78, SOUTH, uim1_reset, NA, NA, NA, NA, NA, NA, NA, NA,
			0, -1),
	[79] = PINGROUP(79, SOUTH, uim1_present, NA, NA, NA, NA, NA, NA, NA,		[79] = PINGROUP(79, SOUTH, uim1_present, NA, NA, NA, NA, NA, NA, NA,
	NA),		NA, 0x71000, 5),
	[80] = PINGROUP(80, WEST, qup2, dac_calib19, NA, NA, NA, NA, NA, NA,		[80] = PINGROUP(80, WEST, qup2, dac_calib19, NA, NA, NA, NA, NA, NA,
	NA),		NA, 0x71000, 13),
	[81] = PINGROUP(81, WEST, mdp_vsync, mdp_vsync, mdp_vsync, dac_calib20,		[81] = PINGROUP(81, WEST, mdp_vsync, mdp_vsync, mdp_vsync, dac_calib20,
	NA, NA, NA, NA, NA),		NA, NA, NA, NA, NA, 0x71000, 14),
	[82] = PINGROUP(82, WEST, qup0, dac_calib21, NA, NA, NA, NA, NA, NA,		[82] = PINGROUP(82, WEST, qup0, dac_calib21, NA, NA, NA, NA, NA, NA,
	NA),		NA, 0, -1),
	[83] = PINGROUP(83, WEST, NA, NA, NA, NA, NA, NA, NA, NA, NA),		[83] = PINGROUP(83, WEST, NA, NA, NA, NA, NA, NA, NA, NA, NA,
	[84] = PINGROUP(84, WEST, NA, NA, NA, NA, NA, NA, NA, NA, NA),		0x71000, 15),
	[85] = PINGROUP(85, WEST, NA, NA, NA, NA, NA, NA, NA, NA, NA),		[84] = PINGROUP(84, WEST, NA, NA, NA, NA, NA, NA, NA, NA, NA,
			0x71000, 16),
			[85] = PINGROUP(85, WEST, NA, NA, NA, NA, NA, NA, NA, NA, NA,
			0x71000, 17),
	[86] = PINGROUP(86, WEST, qup0, GCC_GP1, atest_bbrx1, NA, NA, NA, NA,		[86] = PINGROUP(86, WEST, qup0, GCC_GP1, atest_bbrx1, NA, NA, NA, NA,
	NA, NA),		NA, NA, 0x71000, 18),
	[87] = PINGROUP(87, EAST, pbs11, qdss_gpio11, NA, NA, NA, NA, NA, NA,		[87] = PINGROUP(87, EAST, pbs11, qdss_gpio11, NA, NA, NA, NA, NA, NA,
	NA),		NA, 0x71000, 19),
	[88] = PINGROUP(88, EAST, NA, NA, NA, NA, NA, NA, NA, NA, NA),		[88] = PINGROUP(88, EAST, NA, NA, NA, NA, NA, NA, NA, NA, NA,
			0x71000, 20),
	[89] = PINGROUP(89, WEST, usb_phy, atest_bbrx0, NA, NA, NA, NA, NA, NA,		[89] = PINGROUP(89, WEST, usb_phy, atest_bbrx0, NA, NA, NA, NA, NA, NA,
	NA),		NA, 0x71000, 19),
	[90] = PINGROUP(90, EAST, mss_lte, pbs12, qdss_gpio12, NA, NA, NA, NA,		[90] = PINGROUP(90, EAST, mss_lte, pbs12, qdss_gpio12, NA, NA, NA, NA,
	NA, NA),		NA, NA, 0, -1),
	[91] = PINGROUP(91, EAST, mss_lte, pbs13, qdss_gpio13, NA, NA, NA, NA,		[91] = PINGROUP(91, EAST, mss_lte, pbs13, qdss_gpio13, NA, NA, NA, NA,
	NA, NA),		NA, NA, 0x71000, 21),
	[92] = PINGROUP(92, WEST, NA, NA, NA, NA, NA, NA, NA, NA, NA),		[92] = PINGROUP(92, WEST, NA, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1),
	[93] = PINGROUP(93, WEST, NA, NA, NA, NA, NA, NA, NA, NA, NA),		[93] = PINGROUP(93, WEST, NA, NA, NA, NA, NA, NA, NA, NA, NA,
			0x71000, 20),
	[94] = PINGROUP(94, WEST, NA, qdss_gpio14, wlan1_adc0, NA, NA, NA, NA,		[94] = PINGROUP(94, WEST, NA, qdss_gpio14, wlan1_adc0, NA, NA, NA, NA,
	NA, NA),		NA, NA, 0x71000, 21),
	[95] = PINGROUP(95, WEST, NAV_GPIO, GP_PDM0, qdss_gpio15, wlan1_adc1,		[95] = PINGROUP(95, WEST, NAV_GPIO, GP_PDM0, qdss_gpio15, wlan1_adc1,
	NA, NA, NA, NA, NA),		NA, NA, NA, NA, NA, 0x71000, 22),
	[96] = PINGROUP(96, WEST, qup4, NAV_GPIO, mdp_vsync, GP_PDM1, sd_write,		[96] = PINGROUP(96, WEST, qup4, NAV_GPIO, mdp_vsync, GP_PDM1, sd_write,
	JITTER_BIST, qdss_cti, qdss_cti, NA),		JITTER_BIST, qdss_cti, qdss_cti, NA, 0x71000, 23),
	[97] = PINGROUP(97, WEST, qup4, NAV_GPIO, mdp_vsync, GP_PDM2,		[97] = PINGROUP(97, WEST, qup4, NAV_GPIO, mdp_vsync, GP_PDM2,
	JITTER_BIST, qdss_cti, qdss_cti, NA, NA),		JITTER_BIST, qdss_cti, qdss_cti, NA, NA, 0x71000, 24),
	[98] = PINGROUP(98, SOUTH, NA, NA, NA, NA, NA, NA, NA, NA, NA),		[98] = PINGROUP(98, SOUTH, NA, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1),
	[99] = PINGROUP(99, SOUTH, NA, NA, NA, NA, NA, NA, NA, NA, NA),		[99] = PINGROUP(99, SOUTH, NA, NA, NA, NA, NA, NA, NA, NA, NA,
			0x71000, 6),
	[100] = PINGROUP(100, SOUTH, atest_gpsadc_dtest0_native, NA, NA, NA,		[100] = PINGROUP(100, SOUTH, atest_gpsadc_dtest0_native, NA, NA, NA,
	NA, NA, NA, NA, NA),		NA, NA, NA, NA, NA, 0, -1),
	[101] = PINGROUP(101, SOUTH, atest_gpsadc_dtest1_native, NA, NA, NA,		[101] = PINGROUP(101, SOUTH, atest_gpsadc_dtest1_native, NA, NA, NA,
	NA, NA, NA, NA, NA),		NA, NA, NA, NA, NA, 0, -1),
	[102] = PINGROUP(102, SOUTH, NA, phase_flag28, dac_calib22, ddr_pxi2,		[102] = PINGROUP(102, SOUTH, NA, phase_flag28, dac_calib22, ddr_pxi2,
	NA, NA, NA, NA, NA),		NA, NA, NA, NA, NA, 0x71000, 7),
	[103] = PINGROUP(103, SOUTH, NA, phase_flag29, dac_calib23, ddr_pxi2,		[103] = PINGROUP(103, SOUTH, NA, phase_flag29, dac_calib23, ddr_pxi2,
	NA, NA, NA, NA, NA),		NA, NA, NA, NA, NA, 0x71000, 8),
	[104] = PINGROUP(104, SOUTH, NA, phase_flag30, qdss_gpio1, dac_calib24,		[104] = PINGROUP(104, SOUTH, NA, phase_flag30, qdss_gpio1, dac_calib24,
	ddr_pxi3, NA, NA, NA, NA),		ddr_pxi3, NA, NA, NA, NA, 0x71000, 9),
	[105] = PINGROUP(105, SOUTH, NA, phase_flag31, qdss_gpio, dac_calib25,		[105] = PINGROUP(105, SOUTH, NA, phase_flag31, qdss_gpio, dac_calib25,
	ddr_pxi3, NA, NA, NA, NA),		ddr_pxi3, NA, NA, NA, NA, 0x71000, 10),
	[106] = PINGROUP(106, SOUTH, NAV_GPIO, GCC_GP3, qdss_gpio, NA, NA, NA,		[106] = PINGROUP(106, SOUTH, NAV_GPIO, GCC_GP3, qdss_gpio, NA, NA, NA,
	NA, NA, NA),		NA, NA, NA, 0x71000, 11),
	[107] = PINGROUP(107, SOUTH, NAV_GPIO, GCC_GP2, qdss_gpio0, NA, NA, NA,		[107] = PINGROUP(107, SOUTH, NAV_GPIO, GCC_GP2, qdss_gpio0, NA, NA, NA,
	NA, NA, NA),		NA, NA, NA, 0x71000, 12),
	[108] = PINGROUP(108, SOUTH, NAV_GPIO, NA, NA, NA, NA, NA, NA, NA, NA),		[108] = PINGROUP(108, SOUTH, NAV_GPIO, NA, NA, NA, NA, NA, NA, NA, NA,
			0, -1),
	[109] = PINGROUP(109, SOUTH, NA, qdss_gpio2, NA, NA, NA, NA, NA, NA,		[109] = PINGROUP(109, SOUTH, NA, qdss_gpio2, NA, NA, NA, NA, NA, NA,
	NA),		NA, 0x71000, 13),
	[110] = PINGROUP(110, SOUTH, NA, qdss_gpio3, NA, NA, NA, NA, NA, NA,		[110] = PINGROUP(110, SOUTH, NA, qdss_gpio3, NA, NA, NA, NA, NA, NA,
	NA),		NA, 0, -1),
	[111] = PINGROUP(111, SOUTH, NA, NA, NA, NA, NA, NA, NA, NA, NA),		[111] = PINGROUP(111, SOUTH, NA, NA, NA, NA, NA, NA, NA, NA, NA, 0, -1),
	[112] = PINGROUP(112, SOUTH, NA, NA, NA, NA, NA, NA, NA, NA, NA),		[112] = PINGROUP(112, SOUTH, NA, NA, NA, NA, NA, NA, NA, NA, NA,
			0x71000, 14),
	[113] = SDC_QDSD_PINGROUP(sdc1_rclk, 0x175000, 15, 0),		[113] = SDC_QDSD_PINGROUP(sdc1_rclk, 0x175000, 15, 0),
	[114] = SDC_QDSD_PINGROUP(sdc1_clk, 0x175000, 13, 6),		[114] = SDC_QDSD_PINGROUP(sdc1_clk, 0x175000, 13, 6),
	[115] = SDC_QDSD_PINGROUP(sdc1_cmd, 0x175000, 11, 3),		[115] = SDC_QDSD_PINGROUP(sdc1_cmd, 0x175000, 11, 3),