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Commit bdaf10ac authored by Urvashi Agrawal's avatar Urvashi Agrawal Committed by Carter Cooper
Browse files

msm: kgsl: Fixup the RSCC register offsets 



The RSCC registers were mapped at the wrong offset,
fix the offset for a6x.

Change-Id: I2f88f58520806bdf2b1c0440f1616744cfa77eea
Signed-off-by: default avatarUrvashi Agrawal <urvaagra@codeaurora.org>
Signed-off-by: default avatarCarter Cooper <ccooper@codeaurora.org>
parent 4f5a0984

drivers/gpu/msm/a6xx_reg.h

+3 −3
Original line number Diff line number Diff line
@@ -1054,9 +1054,9 @@ 
#define A6XX_RSCC_SEQ_BUSY_DRV0				0x23501

#define A6XX_RSCC_SEQ_MEM_0_DRV0			0x23580

#define A6XX_RSCC_TCS0_DRV0_STATUS			0x23746

#define A6XX_RSCC_TCS1_DRV0_STATUS                      0x238AE

#define A6XX_RSCC_TCS2_DRV0_STATUS                      0x23A16

#define A6XX_RSCC_TCS3_DRV0_STATUS                      0x23B7E

#define A6XX_RSCC_TCS1_DRV0_STATUS                      0x237EE

#define A6XX_RSCC_TCS2_DRV0_STATUS                      0x23896

#define A6XX_RSCC_TCS3_DRV0_STATUS                      0x2393E



/* GPU PDC sequencer registers in AOSS.RPMh domain */

#define PDC_GPU_ENABLE_PDC			0x1140